| *** Pre-CBMEM romstage console overflowed, log truncated! *** |
| |
| Found compatible clock, CAS pair. |
| Selected DRAM frequency: 666 MHz |
| Selected CAS latency : 9T |
| PLL busy... done in 60 us |
| MCU frequency is set at : 666 MHz |
| Done dimm mapping |
| Update PCI-E configuration space: |
| PCI(0, 0, 0)[a0] = 0 |
| PCI(0, 0, 0)[a4] = 2 |
| PCI(0, 0, 0)[bc] = 82a00000 |
| PCI(0, 0, 0)[a8] = 7b600000 |
| PCI(0, 0, 0)[ac] = 2 |
| PCI(0, 0, 0)[b8] = 80000000 |
| PCI(0, 0, 0)[b0] = 80a00000 |
| PCI(0, 0, 0)[b4] = 80800000 |
| PCI(0, 0, 0)[7c] = 7f |
| PCI(0, 0, 0)[70] = fe000000 |
| PCI(0, 0, 0)[74] = 1 |
| PCI(0, 0, 0)[78] = fe000c00 |
| Done memory map |
| Done io registers |
| t123: 1912, 9120, 500 |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : YES |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 without UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Policy Module |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Entery into Policy Module |
| ME: FWS2: 0x39000006 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x3 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0x0 |
| ME: Current PM event: 0x9 |
| ME: Progress code : 0x3 |
| Waited long enough, or CPU was not replaced, continue... |
| PASSED! Tell ME that DRAM is ready |
| ME: FWS2: 0x390b0006 |
| ME: Bist in progress: 0x0 |
| ME: ICC Status : 0x3 |
| ME: Invoke MEBx : 0x0 |
| ME: CPU replaced : 0x0 |
| ME: MBP ready : 0x0 |
| ME: MFS failure : 0x0 |
| ME: Warm reset req : 0x0 |
| ME: CPU repl valid : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: FW update req : 0x0 |
| ME: (Reserved) : 0x0 |
| ME: Current state : 0xb |
| ME: Current PM event: 0x9 |
| ME: Progress code : 0x3 |
| ME: Requested BIOS Action: Continue to boot |
| ME: FW Partition Table : OK |
| ME: Bringup Loader Failure : NO |
| ME: Firmware Init Complete : NO |
| ME: Manufacturing Mode : NO |
| ME: Boot Options Present : NO |
| ME: Update In Progress : NO |
| ME: Current Working State : Normal |
| ME: Current Operation State : M0 without UMA |
| ME: Current Operation Mode : Normal |
| ME: Error Code : No Error |
| ME: Progress Phase : Policy Module |
| ME: Power Management Event : Non-power cycle reset |
| ME: Progress Phase State : Received DRAM Init Done |
| memcfg DDR3 ref clock 133 MHz |
| memcfg DDR3 clock 1330 MHz |
| memcfg channel assignment: A: 0, B 1, C 2 |
| memcfg channel[0] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| memcfg channel[1] config (00620010): |
| ECC inactive |
| enhanced interleave mode on |
| rank interleave on |
| DIMMA 4096 MB width x8 dual rank, selected |
| DIMMB 0 MB width x8 single rank |
| CBMEM: |
| IMD: root @ 7ffff000 254 entries. |
| IMD: root @ 7fffec00 62 entries. |
| External stage cache: |
| IMD: root @ 803ff000 254 entries. |
| IMD: root @ 803fec00 62 entries. |
| CBMEM entry for DIMM info: 0x7fffea40 |
| MTRR Range: Start=ff800000 End=0 (Size 800000) |
| MTRR Range: Start=0 End=1000000 (Size 1000000) |
| MTRR Range: Start=7f800000 End=80000000 (Size 800000) |
| MTRR Range: Start=80000000 End=80800000 (Size 800000) |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'fallback/postcar' |
| CBFS: Found @ offset 3a1c0 size 3ba0 |
| Decompressing stage fallback/postcar @ 0x7ffcffc0 (31888 bytes) |
| Loading module at 7ffd0000 with entry 7ffd0000. filesize: 0x3990 memsize: 0x7c50 |
| Processing 109 relocs. Offset value of 0x7dfd0000 |
| |
| |
| coreboot-4.8-2488-gb1baa980ea Sat Dec 8 16:13:46 UTC 2018 postcar starting... |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'fallback/ramstage' |
| CBFS: Found @ offset 19cc0 size 18731 |
| Decompressing stage fallback/ramstage @ 0x7ff86fc0 (293464 bytes) |
| Loading module at 7ff87000 with entry 7ff87000. filesize: 0x33810 memsize: 0x47a18 |
| Processing 3454 relocs. Offset value of 0x7f187000 |
| |
| |
| coreboot-4.8-2488-gb1baa980ea Sat Dec 8 16:13:46 UTC 2018 ramstage starting... |
| Normal boot. |
| BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 |
| BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 3 exit 0 |
| Enumerating buses... |
| CPU_CLUSTER: 0 enabled |
| DOMAIN: 0000 enabled |
| PCI: pci_scan_bus for bus 00 |
| PCI: 00:00.0 [8086/0104] enabled |
| PCI: Static device PCI: 00:01.0 not found, disabling it. |
| PCI: 00:02.0 [8086/0126] enabled |
| PCI: 00:04.0 [8086/0103] enabled |
| PCI: 00:16.0: Disabling device |
| PCI: 00:16.0 [8086/1c3a] disabled |
| PCI: 00:16.1: Disabling device |
| PCI: 00:16.2: Disabling device |
| PCI: 00:16.3: Disabling device |
| PCI: 00:19.0 [8086/1502] enabled |
| PCI: 00:1a.0 [8086/1c2d] enabled |
| PCI: 00:1b.0 [8086/1c20] enabled |
| PCH: PCIe Root Port coalescing is enabled |
| PCI: 00:1c.0: Disabling device |
| PCI: 00:1c.0: check set enabled |
| PCH: Remap PCIe function 1 to 0 |
| PCI: 00:1c.1 [8086/1c12] enabled |
| PCI: 00:1c.2: Disabling device |
| PCH: Remap PCIe function 3 to 0 |
| PCI: 00:1c.3 [8086/1c16] enabled |
| PCH: Remap PCIe function 4 to 0 |
| PCI: 00:1c.4 [8086/1c18] enabled |
| PCI: 00:1c.5: Disabling device |
| PCI: 00:1c.6: Disabling device |
| PCI: 00:1c.7: Disabling device |
| PCH: PCIe map 1c.0 -> 1c.4 |
| PCH: PCIe map 1c.1 -> 1c.0 |
| PCH: PCIe map 1c.3 -> 1c.1 |
| PCH: PCIe map 1c.4 -> 1c.3 |
| PCI: 00:1d.0 [8086/1c26] enabled |
| PCI: 00:1e.0: Disabling device |
| PCI: 00:1e.0 [8086/2448] disabled |
| PCI: 00:1f.0 [8086/1c4f] enabled |
| PCI: 00:1f.2 [8086/1c01] enabled |
| PCI: 00:1f.3 [8086/1c22] enabled |
| PCI: 00:1f.5: Disabling device |
| PCI: 00:1f.5 [8086/1c09] disabled No operations |
| PCI: 00:1f.6 [8086/1c24] enabled |
| PCI: pci_scan_bus for bus 01 |
| PCI: 01:00.0 [8086/4238] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 01:00.0 |
| scan_bus: scanning of bus PCI: 00:1c.0 took 301 usecs |
| PCI: pci_scan_bus for bus 02 |
| scan_bus: scanning of bus PCI: 00:1c.1 took 53 usecs |
| PCI: pci_scan_bus for bus 03 |
| PCI: 03:00.0 [1180/e822] enabled |
| Enabling Common Clock Configuration |
| ASPM: Enabled L0s and L1 |
| Failed to enable LTR for dev = PCI: 03:00.0 |
| scan_bus: scanning of bus PCI: 00:1c.3 took 246 usecs |
| PMH7: ID 04 Revision 01 |
| PNP: 00ff.1 enabled |
| PNP: 0c31.0 enabled |
| EC Firmware ID 83HT27WW-3.20, Version 1.01B |
| H8: BDC installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| PNP: 00ff.2 enabled |
| Hybrid graphics: Not installed |
| PNP: 00ff.f disabled |
| scan_bus: scanning of bus PCI: 00:1f.0 took 5115 usecs |
| bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled |
| bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled |
| scan_bus: scanning of bus PCI: 00:1f.3 took 26 usecs |
| scan_bus: scanning of bus DOMAIN: 0000 took 6046 usecs |
| scan_bus: scanning of bus Root Device took 6053 usecs |
| done |
| FMAP: Found "FLASH" version 1.1 at 700000. |
| FMAP: base = ff800000 size = 800000 #areas = 4 |
| FMAP: area RW_MRC_CACHE found @ 710000 (65536 bytes) |
| MRC: No data in cbmem for 'RW_MRC_CACHE'. |
| BS: BS_DEV_ENUMERATE times (us): entry 0 run 6090 exit 25 |
| found VGA at PCI: 00:02.0 |
| Setting up VGA for PCI: 00:02.0 |
| Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 |
| Setting PCI_BRIDGE_CTL_VGA for bridge Root Device |
| Allocating resources... |
| Reading resources... |
| Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. |
| PNP: 00ff.1 missing read_resources |
| PNP: 00ff.2 missing read_resources |
| Done reading resources. |
| skipping PNP: 00ff.2@60 fixed resource, size=0! |
| skipping PNP: 00ff.2@62 fixed resource, size=0! |
| skipping PNP: 00ff.2@64 fixed resource, size=0! |
| skipping PNP: 00ff.2@66 fixed resource, size=0! |
| Setting resources... |
| TOUUD 0x27b600000 TOLUD 0x82a00000 TOM 0x200000000 |
| MEBASE 0x1fe000000 |
| IGD decoded, subtracting 32M UMA and 2M GTT |
| TSEG base 0x80000000 size 8M |
| Available memory below 4GB: 2048M |
| Available memory above 4GB: 6070M |
| PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 |
| PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 |
| PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io |
| PCI: 00:04.0 10 <- [0x00e1620000 - 0x00e1627fff] size 0x00008000 gran 0x0f mem64 |
| PCI: 00:19.0 10 <- [0x00e1600000 - 0x00e161ffff] size 0x00020000 gran 0x11 mem |
| PCI: 00:19.0 14 <- [0x00e162c000 - 0x00e162cfff] size 0x00001000 gran 0x0c mem |
| PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io |
| PCI: 00:1a.0 10 <- [0x00e162f000 - 0x00e162f3ff] size 0x00000400 gran 0x0a mem |
| PCI: 00:1b.0 10 <- [0x00e1628000 - 0x00e162bfff] size 0x00004000 gran 0x0e mem64 |
| PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io |
| PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem |
| PCI: 00:1c.0 20 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 bus 01 mem |
| PCI: 01:00.0 10 <- [0x00e1400000 - 0x00e1401fff] size 0x00002000 gran 0x0d mem64 |
| PCI: 00:1c.1 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 02 io |
| PCI: 00:1c.1 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 02 prefmem |
| PCI: 00:1c.1 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 02 mem |
| NONE missing set_resources |
| PCI: 00:1c.3 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io |
| PCI: 00:1c.3 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 03 prefmem |
| PCI: 00:1c.3 20 <- [0x00e1500000 - 0x00e15fffff] size 0x00100000 gran 0x14 bus 03 mem |
| PCI: 03:00.0 10 <- [0x00e1500000 - 0x00e15000ff] size 0x00000100 gran 0x08 mem |
| PCI: 00:1d.0 10 <- [0x00e1630000 - 0x00e16303ff] size 0x00000400 gran 0x0a mem |
| PNP: 00ff.1 missing set_resources |
| PNP: 00ff.2 missing set_resources |
| PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io |
| PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io |
| PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io |
| PCI: 00:1f.2 24 <- [0x00e162e000 - 0x00e162e7ff] size 0x00000800 gran 0x0b mem |
| PCI: 00:1f.3 10 <- [0x00e1631000 - 0x00e16310ff] size 0x00000100 gran 0x08 mem64 |
| PCI: 00:1f.6 10 <- [0x00e162d000 - 0x00e162dfff] size 0x00001000 gran 0x0c mem64 |
| Done setting resources. |
| Done allocating resources. |
| BS: BS_DEV_RESOURCES times (us): entry 0 run 1651 exit 0 |
| Enabling resources... |
| PCI: 00:00.0 subsystem <- 17aa/21ce |
| PCI: 00:00.0 cmd <- 06 |
| PCI: 00:02.0 subsystem <- 17aa/21ce |
| PCI: 00:02.0 cmd <- 03 |
| PCI: 00:04.0 cmd <- 02 |
| PCI: 00:19.0 subsystem <- 17aa/21ce |
| PCI: 00:19.0 cmd <- 103 |
| PCI: 00:1a.0 subsystem <- 17aa/21ce |
| PCI: 00:1a.0 cmd <- 102 |
| PCI: 00:1b.0 subsystem <- 17aa/21ce |
| PCI: 00:1b.0 cmd <- 102 |
| PCI: 00:1c.0 bridge ctrl <- 0003 |
| PCI: 00:1c.0 subsystem <- 17aa/21ce |
| PCI: 00:1c.0 cmd <- 106 |
| PCI: 00:1c.1 bridge ctrl <- 0003 |
| PCI: 00:1c.1 subsystem <- 17aa/21ce |
| PCI: 00:1c.1 cmd <- 107 |
| PCI: 00:1c.3 bridge ctrl <- 0003 |
| PCI: 00:1c.3 subsystem <- 17aa/21ce |
| PCI: 00:1c.3 cmd <- 106 |
| PCI: 00:1d.0 subsystem <- 17aa/21ce |
| PCI: 00:1d.0 cmd <- 102 |
| pch_decode_init |
| PCI: 00:1f.0 subsystem <- 17aa/21ce |
| PCI: 00:1f.0 cmd <- 107 |
| PCI: 00:1f.2 subsystem <- 17aa/21ce |
| PCI: 00:1f.2 cmd <- 03 |
| PCI: 00:1f.3 subsystem <- 17aa/21ce |
| PCI: 00:1f.3 cmd <- 103 |
| PCI: 00:1f.6 subsystem <- 17aa/21ce |
| PCI: 00:1f.6 cmd <- 02 |
| PCI: 01:00.0 cmd <- 02 |
| PCI: 03:00.0 subsystem <- 17aa/21ce |
| PCI: 03:00.0 cmd <- 06 |
| done. |
| BS: BS_DEV_ENABLE times (us): entry 0 run 176 exit 0 |
| Found TPM ST33ZP24 by ST Microelectronics |
| TPM: Startup |
| TPM: command 0x99 returned 0x0 |
| TPM: Asserting physical presence |
| TPM: command 0x4000000a returned 0x0 |
| TPM: command 0x65 returned 0x0 |
| TPM: flags disable=0, deactivated=0, nvlocked=1 |
| TPM: setup succeeded |
| Initializing devices... |
| Root Device init ... |
| Root Device init finished in 1 usecs |
| CPU_CLUSTER: 0 init ... |
| start_eip=0x00001000, code_size=0x00000031 |
| Setting up SMI for CPU |
| Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0x00038000 |
| SMM Module: stub loaded at 00038000. Will call 7ffa3684(7ffca8e0) |
| Installing SMM handler to 0x80000000 |
| Loading module at 80010000 with entry 80010112. filesize: 0x1350 memsize: 0x5370 |
| Processing 48 relocs. Offset value of 0x80010000 |
| Loading module at 80008000 with entry 80008000. filesize: 0x1a8 memsize: 0x1a8 |
| Processing 13 relocs. Offset value of 0x80008000 |
| SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd |
| SMM Module: placing jmp sequence at 80007800 rel16 0x07fd |
| SMM Module: placing jmp sequence at 80007400 rel16 0x0bfd |
| SMM Module: stub loaded at 80008000. Will call 80010112(00000000) |
| Initializing southbridge SMI... |
| SMI_STS: MCSMI |
| GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 |
| ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 |
| TCO_STS: |
| In relocation handler: cpu 0 |
| New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Relocation complete. |
| Locking SMM. |
| Initializing CPU #0 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13840 size 6400 |
| microcode: sig=0x206a7 pf=0x10 revision=0x2d |
| CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x206a7 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| MTRR: Physical address space: |
| 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 |
| 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 |
| 0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6 |
| 0x0000000080000000 - 0x00000000d0000000 size 0x50000000 type 0 |
| 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 |
| 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 |
| 0x0000000100000000 - 0x000000027b600000 size 0x17b600000 type 6 |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| MTRR: default type WB/UC MTRR counts: 4/4. |
| MTRR: UC selected as default type. |
| MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6 |
| MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 |
| MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6 |
| MTRR: 3 base 0x0000000200000000 mask 0x0000000f80000000 type 6 |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x00 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2800 |
| Turbo is available but hidden |
| Turbo has been enabled |
| CPU: 0 has 2 cores, 2 threads per core |
| CPU: 0 has core 1 |
| In relocation handler: cpu 1 |
| New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| Initializing CPU #1 |
| CPU: 0 has core 2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13840 size 6400 |
| microcode: sig=0x206a7 pf=0x10 revision=0x2d |
| CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x206a7 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x01 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2800 |
| CPU #1 initialized |
| In relocation handler: cpu 2 |
| New SMBASE=0x7ffff800 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| CPU: 0 has core 3 |
| Initializing CPU #2 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13840 size 6400 |
| microcode: sig=0x206a7 pf=0x10 revision=0x0 |
| microcode: updated to revision 0x2d date=2018-02-07 |
| CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x206a7 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x02 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2800 |
| CPU #2 initialized |
| In relocation handler: cpu 3 |
| New SMBASE=0x7ffff400 IEDBASE=0x80400000 @ 0003fc00 |
| Writing SMRR. base = 0x80000006, mask=0xff800800 |
| CPU #0 initialized |
| Waiting for 1 CPUS to stop |
| Initializing CPU #3 |
| CPU: vendor Intel device 206a7 |
| CPU: family 06, model 2a, stepping 07 |
| Enabling cache |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'cpu_microcode_blob.bin' |
| CBFS: Found @ offset 13840 size 6400 |
| microcode: sig=0x206a7 pf=0x10 revision=0x2d |
| CPU: Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz. |
| CPU: platform id 4 |
| CPU: cpuid(1) 0x206a7 |
| CPU: AES supported |
| CPU: TXT supported |
| CPU: VT supported |
| MTRR: Fixed MSR 0x250 0x0606060606060606 |
| MTRR: Fixed MSR 0x258 0x0606060606060606 |
| MTRR: Fixed MSR 0x259 0x0000000000000000 |
| MTRR: Fixed MSR 0x268 0x0606060606060606 |
| MTRR: Fixed MSR 0x269 0x0606060606060606 |
| MTRR: Fixed MSR 0x26a 0x0606060606060606 |
| MTRR: Fixed MSR 0x26b 0x0606060606060606 |
| MTRR: Fixed MSR 0x26c 0x0606060606060606 |
| MTRR: Fixed MSR 0x26d 0x0606060606060606 |
| MTRR: Fixed MSR 0x26e 0x0606060606060606 |
| MTRR: Fixed MSR 0x26f 0x0606060606060606 |
| CPU physical address size: 36 bits |
| |
| MTRR check |
| Fixed MTRRs : Enabled |
| Variable MTRRs: Enabled |
| |
| Setting up local APIC... apic_id: 0x03 done. |
| VMX is locked, so set_vmx will do nothing |
| model_x06ax: energy policy set to 6 |
| model_x06ax: frequency set to 2800 |
| CPU #3 initialized |
| All AP CPUs stopped (627 loops) |
| CPU_CLUSTER: 0 init finished in 61423 usecs |
| PCI: 00:00.0 init ... |
| Disabling PEG12. |
| Disabling PEG11. |
| Disabling PEG10. |
| Disabling PEG60. |
| Disabling Device 7. |
| Disabling PEG IO clock. |
| Set BIOS_RESET_CPL |
| CPU TDP: 35 Watts |
| PCI: 00:00.0 init finished in 1019 usecs |
| PCI: 00:02.0 init ... |
| GT Power Management Init |
| SNB GT2 Power Meter Weights |
| GT Power Management Init (post VBIOS) |
| bringing up panel at resolution 1600 x 900 |
| Borders 0 x 0 |
| Blank 410 x 12 |
| Sync 42 x 3 |
| Front porch 64 x 3 |
| Spread spectrum clock |
| Dual channel |
| Polarities 1, 1 |
| Data M1=1922389, N1=8388608 |
| Link frequency 270000 kHz |
| Link M1=213598, N1=524288 |
| Pixel N=6, M1=14, M2=7, P1=2 |
| Pixel clock 110000 kHz |
| waiting for panel powerup |
| panel powered up |
| PCI: 00:02.0 init finished in 27906 usecs |
| PCI: 00:04.0 init ... |
| PCI: 00:04.0 init finished in 0 usecs |
| PCI: 00:19.0 init ... |
| PCI: 00:19.0 init finished in 0 usecs |
| PCI: 00:1a.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1a.0 init finished in 13 usecs |
| PCI: 00:1b.0 init ... |
| Azalia: base = e1628000 |
| Azalia: codec_mask = 0b |
| Azalia: Initializing codec #3 |
| Azalia: codec viddid: 80862805 |
| Azalia: No verb! |
| Azalia: Initializing codec #1 |
| Azalia: codec viddid: 14f12c06 |
| Azalia: No verb! |
| Azalia: Initializing codec #0 |
| Azalia: codec viddid: 14f1506e |
| Azalia: verb_size: 52 |
| Azalia: verb loaded. |
| PCI: 00:1b.0 init finished in 4345 usecs |
| PCI: 00:1c.0 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.0 init finished in 9 usecs |
| PCI: 00:1c.1 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.1 init finished in 12 usecs |
| PCI: 00:1c.3 init ... |
| Initializing PCH PCIe bridge. |
| PCI: 00:1c.3 init finished in 9 usecs |
| PCI: 00:1d.0 init ... |
| EHCI: Setting up controller.. done. |
| PCI: 00:1d.0 init finished in 11 usecs |
| PCI: 00:1f.0 init ... |
| pch: lpc_init |
| PCH: detected QM67, device id: 0x1c4f, rev id 0x5 |
| IOAPIC: Initializing IOAPIC at 0xfec00000 |
| IOAPIC: Bootstrap Processor Local APIC = 0x00 |
| IOAPIC: ID = 0x02 |
| Set power off after power failure. |
| NMI sources disabled. |
| CougarPoint PM init |
| RTC: failed = 0x0 |
| RTC Init |
| Disabling ACPI via APMC: |
| done. |
| pch_spi_init |
| PCI: 00:1f.0 init finished in 364 usecs |
| PCI: 00:1f.2 init ... |
| SATA: Initializing... |
| SATA: Controller in AHCI mode. |
| ABAR: e162e000 |
| PCI: 00:1f.2 init finished in 93 usecs |
| PCI: 00:1f.3 init ... |
| PCI: 00:1f.3 init finished in 7 usecs |
| PCI: 00:1f.6 init ... |
| PCI: 00:1f.6 init finished in 0 usecs |
| PCI: 01:00.0 init ... |
| PCI: 01:00.0 init finished in 0 usecs |
| PCI: 03:00.0 init ... |
| PCI: 03:00.0 init finished in 14 usecs |
| PNP: 00ff.2 init ... |
| PNP: 00ff.2 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... |
| I2C: 01:54 init finished in 1 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... |
| I2C: 01:55 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... |
| I2C: 01:56 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... |
| I2C: 01:57 init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... |
| Locking EEPROM RFID |
| init EEPROM done |
| I2C: 01:5c init finished in 22801 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... |
| I2C: 01:5d init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... |
| I2C: 01:5e init finished in 0 usecs |
| smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... |
| I2C: 01:5f init finished in 0 usecs |
| Devices initialized |
| BS: BS_DEV_INIT times (us): entry 15836 run 118152 exit 0 |
| Finalize devices... |
| PCI: 00:1f.0 final |
| Devices finalized |
| BS: BS_POST_DEVICE times (us): entry 0 run 46 exit 0 |
| BS: BS_OS_RESUME_CHECK times (us): entry 0 run 3 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'fallback/dsdt.aml' |
| CBFS: Found @ offset 3ddc0 size 35d2 |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'fallback/slic' |
| CBFS: 'fallback/slic' not found. |
| ACPI: Writing ACPI tables at 7ff4a000. |
| ACPI: * FACS |
| ACPI: * DSDT |
| ACPI: * FADT |
| ACPI: added table 1/32, length now 40 |
| ACPI: * SSDT |
| Found 1 CPU(s) with 4 core(s) each. |
| PSS: 2801MHz power 35000 control 0x2300 status 0x2300 |
| PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00 |
| PSS: 2400MHz power 28615 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 22765 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 17346 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 12373 control 0xc00 status 0xc00 |
| PSS: 800MHz power 7830 control 0x800 status 0x800 |
| PSS: 2801MHz power 35000 control 0x2300 status 0x2300 |
| PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00 |
| PSS: 2400MHz power 28615 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 22765 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 17346 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 12373 control 0xc00 status 0xc00 |
| PSS: 800MHz power 7830 control 0x800 status 0x800 |
| PSS: 2801MHz power 35000 control 0x2300 status 0x2300 |
| PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00 |
| PSS: 2400MHz power 28615 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 22765 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 17346 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 12373 control 0xc00 status 0xc00 |
| PSS: 800MHz power 7830 control 0x800 status 0x800 |
| PSS: 2801MHz power 35000 control 0x2300 status 0x2300 |
| PSS: 2800MHz power 35000 control 0x1c00 status 0x1c00 |
| PSS: 2400MHz power 28615 control 0x1800 status 0x1800 |
| PSS: 2000MHz power 22765 control 0x1400 status 0x1400 |
| PSS: 1600MHz power 17346 control 0x1000 status 0x1000 |
| PSS: 1200MHz power 12373 control 0xc00 status 0xc00 |
| PSS: 800MHz power 7830 control 0x800 status 0x800 |
| Generating ACPI PIRQ entries |
| \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 |
| ACPI: * H8 |
| H8: BDC installed |
| H8: WWAN detection not implemented. Assuming WWAN installed |
| \_SB.PCI0.RP01.WIFI: PCI: 01:00.0 |
| ACPI: added table 2/32, length now 44 |
| ACPI: * MCFG |
| ACPI: added table 3/32, length now 48 |
| ACPI: * TCPA |
| TCPA log created at 7ff39000 |
| ACPI: added table 4/32, length now 52 |
| ACPI: * MADT |
| ACPI: added table 5/32, length now 56 |
| current = 7ff4f500 |
| ACPI: * DMAR |
| ACPI: added table 6/32, length now 60 |
| current = 7ff4f5b0 |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'vbt.bin' |
| CBFS: Found @ offset 39400 size 558 |
| Found a VBT of 3985 bytes after decompression |
| GMA: Found VBT in CBFS |
| GMA: Found valid VBT in CBFS |
| ACPI: * HPET |
| ACPI: added table 7/32, length now 64 |
| ACPI: done. |
| ACPI tables: 30192 bytes. |
| smbios_write_tables: 7ff38000 |
| Create SMBIOS type 17 |
| PCI: 01:00.0 (unknown) |
| SMBIOS tables: 670 bytes. |
| Writing table forward entry at 0x00000500 |
| Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe7 |
| Writing coreboot table at 0x7ff6e000 |
| 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES |
| 1. 0000000000001000-000000000009ffff: RAM |
| 2. 00000000000a0000-00000000000fffff: RESERVED |
| 3. 0000000000100000-000000001fffffff: RAM |
| 4. 0000000020000000-00000000201fffff: RESERVED |
| 5. 0000000020200000-000000003fffffff: RAM |
| 6. 0000000040000000-00000000401fffff: RESERVED |
| 7. 0000000040200000-000000007ff37fff: RAM |
| 8. 000000007ff38000-000000007ff86fff: CONFIGURATION TABLES |
| 9. 000000007ff87000-000000007ffcefff: RAMSTAGE |
| 10. 000000007ffcf000-000000007fffffff: CONFIGURATION TABLES |
| 11. 0000000080000000-00000000829fffff: RESERVED |
| 12. 00000000f0000000-00000000f3ffffff: RESERVED |
| 13. 00000000fed40000-00000000fed44fff: RESERVED |
| 14. 00000000fed90000-00000000fed91fff: RESERVED |
| 15. 0000000100000000-000000027b5fffff: RAM |
| Manufacturer: c2 |
| SF: Detected MX25L6405D with sector size 0x1000, total 0x800000 |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| Wrote coreboot table at: 7ff6e000, 0x38c bytes, checksum b52 |
| coreboot table: 932 bytes. |
| IMD ROOT 0. 7ffff000 00001000 |
| IMD SMALL 1. 7fffe000 00001000 |
| CONSOLE 2. 7ffde000 00020000 |
| TIME STAMP 3. 7ffdd000 00000910 |
| ROMSTG STCK 4. 7ffd8000 00005000 |
| AFTER CAR 5. 7ffcf000 00009000 |
| RAMSTAGE 6. 7ff86000 00049000 |
| SMM BACKUP 7. 7ff76000 00010000 |
| COREBOOT 8. 7ff6e000 00008000 |
| ACPI 9. 7ff4a000 00024000 |
| ACPI GNVS 10. 7ff49000 00001000 |
| TCPA TCGLOG11. 7ff39000 00010000 |
| SMBIOS 12. 7ff38000 00000800 |
| IMD small region: |
| IMD ROOT 0. 7fffec00 00000400 |
| MEM INFO 1. 7fffea40 000001a9 |
| ROMSTAGE 2. 7fffea20 00000004 |
| COREBOOTFWD 3. 7fffe9e0 00000028 |
| BS: BS_WRITE_TABLES times (us): entry 0 run 25502 exit 0 |
| CBFS: 'Master Header Locator' located CBFS at [720000:800000) |
| CBFS: Locating 'fallback/payload' |
| CBFS: Found @ offset 41400 size 106fd |
| Checking segment from ROM address 0xfff61438 |
| Payload being loaded at below 1MiB without region being marked as RAM usable. |
| Checking segment from ROM address 0xfff61454 |
| Loading segment from ROM address 0xfff61438 |
| code (compression=1) |
| New segment dstaddr 0x000e0d20 memsize 0x1f2e0 srcaddr 0xfff61470 filesize 0x106c5 |
| Loading Segment: addr: 0x000e0d20 memsz: 0x000000000001f2e0 filesz: 0x00000000000106c5 |
| using LZMA |
| Loading segment from ROM address 0xfff61454 |
| Entry Point 0x000fd274 |
| BS: BS_PAYLOAD_LOAD times (us): entry 1 run 23347 exit 0 |
| PCH: watchdog disabled |
| Jumping to boot code at 000fd274(7ff6e000) |
| SeaBIOS (version rel-1.12.0-0-ga698c89) |
| BUILD: gcc: (coreboot toolchain v1.53 August 16th, 2018) 8.1.0 binutils: (GNU Binutils) 2.30 |
| Found coreboot cbmem console @ 7ffde000 |
| Found mainboard LENOVO ThinkPad T420 |
| Relocating init from 0x000e2380 to 0x7feeb520 (size 51680) |
| Found CBFS header at 0xfff20038 |
| multiboot: eax=7ffb9f80, ebx=7ffb9f34 |
| Found 16 PCI devices (max PCI bus is 03) |
| Copying SMBIOS entry point from 0x7ff38000 to 0x000f67a0 |
| Copying ACPI RSDP from 0x7ff4a000 to 0x000f6770 |
| Using pmtimer, ioport 0x508 |
| Scan for VGA option rom |
| Running option rom at c000:0003 |
| pmm call arg1=0 |
| Turning on vga text mode console |
| SeaBIOS (version rel-1.12.0-0-ga698c89) |
| Machine UUID f7c29201-520c-11cb-ae0a-853cb0d59b9b |
| EHCI init on dev 00:1a.0 (regs=0xe162f020) |
| EHCI init on dev 00:1d.0 (regs=0xe1630020) |
| AHCI controller at 00:1f.2, iobase 0xe162e000, irq 10 |
| Searching bootorder for: /pci@i0cf8/pci-bridge@1c,3/*@0 |
| Found 0 lpt ports |
| Found 0 serial ports |
| Discarding ps2 data f0 (status=11) |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0 |
| AHCI/0: Set transfer mode to UDMA-6 |
| AHCI/0: registering: "AHCI/0: ST320LT007-9ZV142 ATA-8 Hard-Disk (298 GiBytes)" |
| Searching bootorder for: /pci@i0cf8/*@1f,2/drive@1/disk@0 |
| AHCI/1: Set transfer mode to UDMA-6 |
| AHCI/1: registering: "AHCI/1: ST9500325ASG ATA-8 Hard-Disk (465 GiBytes)" |
| Initialized USB HUB (0 ports used) |
| Initialized USB HUB (0 ports used) |
| PS2 keyboard initialized |
| All threads complete. |
| Scan for option roms |
| |
| Press ESC for boot menu. |
| |
| Searching bootorder for: HALT |
| drive 0x000f6700: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=625142448 |
| drive 0x000f66b0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=976773168 |
| Space available for UMB: c7000-ed800, f5fc0-f66b0 |
| Returned 253952 bytes of ZoneHigh |
| e820 map has 13 items: |
| 0: 0000000000000000 - 000000000009fc00 = 1 RAM |
| 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED |
| 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED |
| 3: 0000000000100000 - 0000000020000000 = 1 RAM |
| 4: 0000000020000000 - 0000000020200000 = 2 RESERVED |
| 5: 0000000020200000 - 0000000040000000 = 1 RAM |
| 6: 0000000040000000 - 0000000040200000 = 2 RESERVED |
| 7: 0000000040200000 - 000000007ff36000 = 1 RAM |
| 8: 000000007ff36000 - 0000000082a00000 = 2 RESERVED |
| 9: 00000000f0000000 - 00000000f4000000 = 2 RESERVED |
| 10: 00000000fed40000 - 00000000fed45000 = 2 RESERVED |
| 11: 00000000fed90000 - 00000000fed92000 = 2 RESERVED |
| 12: 0000000100000000 - 000000027b600000 = 1 RAM |
| enter handle_19: |
| NULL |
| Booting from Hard Disk... |
| Booting from 0000:7c00 |
| |