| /* |
| * Intel ACPI Component Architecture |
| * AML/ASL+ Disassembler version 20160831-64 |
| * Copyright (c) 2000 - 2016 Intel Corporation |
| * |
| * Disassembling to symbolic ASL+ operators |
| * |
| * Disassembly of ssdt1.dat, Mon Jan 2 15:19:14 2017 |
| * |
| * Original Table Header: |
| * Signature "SSDT" |
| * Length 0x00000214 (532) |
| * Revision 0x01 |
| * Checksum 0x0C |
| * OEM ID "AMI" |
| * OEM Table ID "CPU1PM" |
| * OEM Revision 0x00000001 (1) |
| * Compiler ID "INTL" |
| * Compiler Version 0x20060113 (537264403) |
| */ |
| DefinitionBlock ("", "SSDT", 1, "AMI", "CPU1PM", 0x00000001) |
| { |
| External (_PR_.CPU1, DeviceObj) |
| External (CFGD, UnknownObj) |
| External (NCPU, UnknownObj) |
| External (TYPE, UnknownObj) |
| |
| Scope (\_PR.CPU1) |
| { |
| Name (NPCT, Package (0x02) |
| { |
| ResourceTemplate () |
| { |
| Register (FFixedHW, |
| 0x40, // Bit Width |
| 0x00, // Bit Offset |
| 0x0000000000000199, // Address |
| ,) |
| }, |
| |
| ResourceTemplate () |
| { |
| Register (FFixedHW, |
| 0x10, // Bit Width |
| 0x00, // Bit Offset |
| 0x0000000000000198, // Address |
| ,) |
| } |
| }) |
| Name (SPCT, Package (0x02) |
| { |
| ResourceTemplate () |
| { |
| Register (SystemIO, |
| 0x10, // Bit Width |
| 0x00, // Bit Offset |
| 0x0000000000000900, // Address |
| ,) |
| }, |
| |
| ResourceTemplate () |
| { |
| Register (SystemIO, |
| 0x10, // Bit Width |
| 0x00, // Bit Offset |
| 0x0000000000000902, // Address |
| ,) |
| } |
| }) |
| Method (_PCT, 0, NotSerialized) // _PCT: Performance Control |
| { |
| If ((TYPE & 0x01) == 0x01) |
| { |
| Return (NPCT) /* \_PR_.CPU1.NPCT */ |
| } |
| Else |
| { |
| Return (SPCT) /* \_PR_.CPU1.SPCT */ |
| } |
| } |
| |
| Name (XPSS, 0x03) |
| Name (_PPC, 0x00) // _PPC: Performance Present Capabilities |
| Name (SPSS, Package (0x03) |
| { |
| Package (0x06) |
| { |
| 0x000007D0, |
| 0x000157C0, |
| 0x0000006E, |
| 0x0000000A, |
| 0x00000086, |
| 0x00000000 |
| }, |
| |
| Package (0x06) |
| { |
| 0x00000640, |
| 0x00011880, |
| 0x0000006E, |
| 0x0000000A, |
| 0x00000186, |
| 0x00000001 |
| }, |
| |
| Package (0x06) |
| { |
| 0x000004B0, |
| 0x0000E0D0, |
| 0x0000006E, |
| 0x0000000A, |
| 0x00000286, |
| 0x00000002 |
| } |
| }) |
| Name (NPSS, Package (0x03) |
| { |
| Package (0x06) |
| { |
| 0x000007D0, |
| 0x000157C0, |
| 0x0000000A, |
| 0x0000000A, |
| 0x00000A27, |
| 0x00000A27 |
| }, |
| |
| Package (0x06) |
| { |
| 0x00000640, |
| 0x00011880, |
| 0x0000000A, |
| 0x0000000A, |
| 0x00000822, |
| 0x00000822 |
| }, |
| |
| Package (0x06) |
| { |
| 0x000004B0, |
| 0x0000E0D0, |
| 0x0000000A, |
| 0x0000000A, |
| 0x0000061D, |
| 0x0000061D |
| } |
| }) |
| Method (_PSS, 0, NotSerialized) // _PSS: Performance Supported States |
| { |
| If ((TYPE & 0x01) == 0x01) |
| { |
| Return (NPSS) /* \_PR_.CPU1.NPSS */ |
| } |
| Else |
| { |
| Return (SPSS) /* \_PR_.CPU1.SPSS */ |
| } |
| } |
| |
| Method (_PSD, 0, NotSerialized) // _PSD: Power State Dependencies |
| { |
| If (CFGD & 0x01000000) |
| { |
| If (TYPE & 0x0800) |
| { |
| Return (Package (0x01) |
| { |
| Package (0x05) |
| { |
| 0x05, |
| 0x00, |
| 0x00, |
| 0xFE, |
| NCPU |
| } |
| }) |
| } |
| |
| Return (Package (0x01) |
| { |
| Package (0x05) |
| { |
| 0x05, |
| 0x00, |
| 0x00, |
| 0xFC, |
| NCPU |
| } |
| }) |
| } |
| |
| Return (Package (0x01) |
| { |
| Package (0x05) |
| { |
| 0x05, |
| 0x00, |
| 0x00, |
| 0xFC, |
| NCPU |
| } |
| }) |
| } |
| } |
| } |
| |