Convert bootup code (int18/int19) to 32bit mode.
The boot entry points should not require 16bit mode, so use 32bit mode
instead.
diff --git a/Makefile b/Makefile
index caf3fcc..30a3943 100644
--- a/Makefile
+++ b/Makefile
@@ -8,10 +8,10 @@
OUT=out/
# Source files
-SRCBOTH=output.c util.c floppy.c ata.c system.c mouse.c kbd.c pci.c boot.c \
- serial.c clock.c pic.c
-SRC16=$(SRCBOTH) disk.c cdrom.c apm.c pcibios.c
-SRC32=$(SRCBOTH) post.c shadow.c post_menu.c memmap.c coreboot.c \
+SRCBOTH=output.c util.c floppy.c ata.c system.c mouse.c kbd.c pci.c \
+ serial.c clock.c pic.c cdrom.c
+SRC16=$(SRCBOTH) disk.c apm.c pcibios.c
+SRC32=$(SRCBOTH) post.c shadow.c post_menu.c memmap.c coreboot.c boot.c \
acpi.c pirtable.c smm.c smpdetect.c mptable.c smbios.c pciinit.c
TABLESRC=font.c cbt.c floppy_dbt.c
diff --git a/src/boot.c b/src/boot.c
index 850fb25..9bbbf07 100644
--- a/src/boot.c
+++ b/src/boot.c
@@ -77,8 +77,6 @@
static void
try_boot(u16 seq_nr)
{
- irq_enable();
-
SET_EBDA(ipl.sequence, seq_nr);
u32 bootdev = GET_EBDA(ipl.bootorder);
@@ -193,7 +191,7 @@
}
// Boot Failure recovery: try the next device.
-void VISIBLE16
+void VISIBLE32
handle_18()
{
debug_serial_setup();
@@ -203,7 +201,7 @@
}
// INT 19h Boot Load Service Entry Point
-void VISIBLE16
+void VISIBLE32
handle_19()
{
debug_serial_setup();
diff --git a/src/romlayout.S b/src/romlayout.S
index cd1de84..6eda036 100644
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -110,6 +110,7 @@
xorw %ax, %ax
movw %ax, %ss
movl $ BUILD_STACK_ADDR , %esp
+ cld
.endm
// Specify a location in the fixed part of bios area.
@@ -130,8 +131,6 @@
pushl $_code32__start
- cld
-
// Fall through to transition32 function below
@@ -432,12 +431,14 @@
.global entry_19
entry_19:
RESET_STACK
- ENTRY handle_19
+ pushl $_code32_handle_19
+ jmp transition32
.global entry_18
entry_18:
RESET_STACK
- ENTRY handle_18
+ pushl $_code32_handle_18
+ jmp transition32
// IRQ trampolines
.macro IRQ_TRAMPOLINE num