vgabios: Add the geode GX2 functionality.

Signed-off-by: Nils Jacobs <njacobs8 at adsltotaal.nl>
diff --git a/src/Kconfig b/src/Kconfig
index 8fb9a66..099cd15 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -337,6 +337,12 @@
         help
             Build support for Bochs DISPI interface.
 
+    config VGA_GEODEGX2
+        bool "GeodeGX2 interface VGA BIOS"
+        default n
+        help
+            Build support for Geode GX2 vga.
+
     config VGA_GEODELX
         bool "GeodeLX interface VGA BIOS"
         default n
@@ -355,6 +361,7 @@
         hex "PCI Vendor ID"
         default 0x1013 if VGA_CIRRUS
         default 0x1234 if VGA_BOCHS
+        default 0x100b if VGA_GEODEGX2
         default 0x1022 if VGA_GEODELX
         default 0x0000
         help
@@ -365,6 +372,7 @@
         hex "PCI Device ID"
         default 0x00b8 if VGA_CIRRUS
         default 0x1111 if VGA_BOCHS
+        default 0x0030 if VGA_GEODEGX2
         default 0x2081 if VGA_GEODELX
         default 0x0000
         help
diff --git a/vgasrc/geodevga.c b/vgasrc/geodevga.c
index 0008abe..7735fdc 100644
--- a/vgasrc/geodevga.c
+++ b/vgasrc/geodevga.c
@@ -87,7 +87,10 @@
     int ret=0;
     union u64_u32_u val;
 
-    val=geode_msrRead(MSR_GLIU0_BASE4);
+    if (CONFIG_VGA_GEODEGX2)
+        val=geode_msrRead(GLIU0_P2D_BM_4);
+    else
+        val=geode_msrRead(MSR_GLIU0_BASE4);
     if (val.lo != 0x0A0fffe0)
         ret|=1;
 
@@ -255,7 +258,10 @@
 
     dprintf(2,"VP_SETUP\n");
     /* set output to crt and RGB/YUV */
-    geode_msrWrite(VP_MSR_CONFIG,~0 ,~0xf8,0,0);
+    if (CONFIG_VGA_GEODEGX2)
+    geode_msrWrite(VP_MSR_CONFIG_GX2,~0 ,~0xf8,0,0);
+    else
+    geode_msrWrite(VP_MSR_CONFIG_LX,~0 ,~0xf8,0,0);
 
     /* get vp register base from pci */
     outl(GEODE_PCI_VP,PORT_PCI_CMD);
diff --git a/vgasrc/geodevga.h b/vgasrc/geodevga.h
index 65e698c..ec019a4 100644
--- a/vgasrc/geodevga.h
+++ b/vgasrc/geodevga.h
@@ -37,11 +37,13 @@
 
 /* LX MSRs */
 #define MSR_GLIU0                       (1 << 28)
-#define MSR_GLIU0_BASE4                 (MSR_GLIU0 + 0x23)
+#define MSR_GLIU0_BASE4                 (MSR_GLIU0 + 0x23)  /* LX */
+#define GLIU0_P2D_BM_4                  (MSR_GLIU0 + 0x24)  /* GX2 */
 #define GLIU0_IOD_BM_0                  (MSR_GLIU0 + 0xE0)
 #define GLIU0_IOD_BM_1                  (MSR_GLIU0 + 0xE1)
 #define DC_SPARE                        0x80000011
-#define VP_MSR_CONFIG                   0x48002001
+#define VP_MSR_CONFIG_GX2               0xc0002001  /* GX2 */
+#define VP_MSR_CONFIG_LX                0x48002001  /* LX */
 
 /* DC REG OFFSET */
 #define DC_UNLOCK                       0x0
diff --git a/vgasrc/vgahw.h b/vgasrc/vgahw.h
index fea041a..23b4f13 100644
--- a/vgasrc/vgahw.h
+++ b/vgasrc/vgahw.h
@@ -22,7 +22,7 @@
         return clext_init();
     if (CONFIG_VGA_BOCHS)
         return bochsvga_init();
-    if (CONFIG_VGA_GEODELX)
+    if (CONFIG_VGA_GEODEGX2 || CONFIG_VGA_GEODELX)
         return geodevga_init();
     return stdvga_init();
 }