1. f059e97 google/oak: Initialize i2c bus timing register for TPM and external buck by jun.gao · 9 years ago
  2. 72980b1 google/oak: add event log by CC Ma · 9 years ago
  3. 27eba67 google/oak: Add soc ARM Trusted Firmware support by Jimmy Huang · 9 years ago
  4. f3570d2 mediatek/mt8173: Add soc ARM Trusted Firmware support by Jimmy Huang · 9 years ago
  5. fa2ed27 mediatek/mt8173: Provide I2C bus initialization API by jun.gao · 9 years ago
  6. dac5337 google/oak: Initialize DRAM by Peter Kao · 9 years ago
  7. da1e02a mediatek/mt8173: Add EMI driver, DRAM initialization by Peter Kao · 9 years ago
  8. b74a2ec mediatek/mt8173: enable RTC in ramstage by CC Ma · 9 years ago
  9. a3f7fe8 mt8173: add SPI NOR support by mtk05962 · 9 years ago
  10. 92fc072 northbridge/intel: move mrccache.c of sandybridge + haswell to common by Alexander Couzens · 8 years ago
  11. 81c5c76 northbridge/intel: move mrc_cache definition into a common header by Alexander Couzens · 8 years ago
  12. 013accc spi/SST: fix write support for SST25VF064C by Alexander Couzens · 8 years ago
  13. f0ab23c nortbridge/sandybridge/mrccache: parse the return code of flash->write by Alexander Couzens · 8 years ago
  14. 10d6fce nb/amd/mct_ddr3: Train correct receiver in TrainDQSRdWrPos_D_Fam15 by Timothy Pearson · 8 years ago
  15. ed85f61 nb/amd/mct_ddr3: Consolidate calls to MCT minimum clock setting fetch by Timothy Pearson · 8 years ago
  16. 2e1f731 nb/amd/mct_ddr3: Require minumum training quality for both read and write by Timothy Pearson · 8 years ago
  17. 50583f0 nb/amd/mct_ddr3: Set read DQS delay to 1UI before calculating read latency by Timothy Pearson · 8 years ago
  18. 8eb221d nb/amd/mct_ddr3: Properly initialize arrays and add bounds checks by Timothy Pearson · 8 years ago
  19. bbfcf62 nb/amd/mct_ddr3: Restore previous DQS delay values on failed loop by Timothy Pearson · 8 years ago
  20. 7109304 soc/intel/apollolake: Avoid hardcoding CAR region size for FSPM by Andrey Petrov · 8 years ago
  21. 3677520 arch/x86/smbios: fix length calculation for SMBIOS type 17 by Iru Cai · 8 years ago
  22. f2e0461 Kconfig: remove COMPRESS_PRERAM_STAGES option from x86 by Martin Roth · 8 years ago
  23. 447d948 cbmem: Fix cbmem_add_bootmem() by Andrey Petrov · 8 years ago
  24. c7a1a3e northbridge/i945/gma: Re-enable NVRAM tft_brightness by Alexander Couzens · 8 years ago
  25. a2176d8 soc/apollolake: Add memory and reserve MMIO resources by Andrey Petrov · 8 years ago
  26. 555d6c2 cbmem: Add utility to get memory region occupied by cbmem by Alexandru Gagniuc · 9 years ago
  27. 1e70cda soc/intel/apollolake: Avoid UART BAR relocation at ramstage by Andrey Petrov · 8 years ago
  28. e953dce soc/intel/apollolake: Add ids of internal SoC PCI devices by Andrey Petrov · 8 years ago
  29. ffc51d4 mainboard/intel/apollolake_rvp: Populate static devicetree by Lance Zhao · 8 years ago
  30. 70efecd soc/intel/apollolake: Add chip initialization by Andrey Petrov · 8 years ago
  31. 9d903a1 soc/apollolake: Enable all CPU cores using the parallel MP lib by Ravi Sarawadi · 8 years ago
  32. 7760261 src/lib/trace.c: Make address size generic by Martin Roth · 8 years ago
  33. 7e3903b cpu/via/c7: Don't manually include udelay_io.c by Stefan Reinauer · 8 years ago
  34. 3d840d0 northbridge/intel/i440bx: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  35. 422bf6b mainboards/google/auron_paine: add new port by Georg Wicherski · 9 years ago
  36. 1eb1e3b mainboard/intel/apollolake_rvp: Add memory training config by Lance Zhao · 8 years ago
  37. fffee87 Makefile: Add build-time overlap check for programs loaded after coreboot by Julius Werner · 8 years ago
  38. 0819a47 northbridge/intel/gm45: Use TSC for ramstage timer per default by Stefan Reinauer · 8 years ago
  39. 0fcd6f9 drivers/intel/fsp2_0: remove struct resource usage by Aaron Durbin · 8 years ago
  40. 9b28f002 drivers/intel/fsp2_0: add TODOs to fix deficiencies by Aaron Durbin · 8 years ago
  41. 40672be drivers/intel/fsp2_0: don't leak resources by Aaron Durbin · 8 years ago
  42. ac1c9ec soc/intel/apollolake: correct comment to reference top of CAR by Aaron Durbin · 8 years ago
  43. e884592 lib/memrange: add function to initialize range_entry by Aaron Durbin · 8 years ago
  44. 2a08137 x86 chipsets: utilize x86_setup_mtrrs_with_detect() by Aaron Durbin · 8 years ago
  45. f545208 nyan: Fix timestamps and CBFS SPI integration by Julius Werner · 8 years ago
  46. 61980af mainboard/skylake: Include WRDD method in WIFI ACPI device by Duncan Laurie · 8 years ago
  47. 3d3b76b skylake: Add and fill out CID1 NVS field by Duncan Laurie · 8 years ago
  48. 8951ed8 intel/wifi: Add WRDD ACPI method by Duncan Laurie · 8 years ago
  49. 339886c Chromeos: Modify wifi_regulatory_domain to use "region" key in VPD by Huang, Huki · 8 years ago
  50. 7f76165 lib: Implement framework for retrieving WiFi regulatory domain by Felix Durairaj · 9 years ago
  51. d76d60b soc/intel/quark: Set the UPD values for MemoryInit by Lee Leahy · 8 years ago
  52. 491c016 soc/intel/apollolake: Add cbmem_top() implementation by Andrey Petrov · 8 years ago
  53. 41aa8bc Kconfig: Remove unneeded UDELAY_IO redeclaration by Stefan Reinauer · 8 years ago
  54. e63be89 cpu/x86/mtrr: add helper function to detect variable MTRRs by Aaron Durbin · 8 years ago
  55. e99e2b6 soc/intel/quark: Add the UPD support for SiliconInit by Lee Leahy · 8 years ago
  56. 9d5e36e cpu/x86: Sort some Kconfig options by Stefan Reinauer · 9 years ago
  57. 0d18791 soc/intel/apollolake: Enable using FSP 2.0 driver by Andrey Petrov · 8 years ago
  58. b483146 soc/intel/apollolake: Add romstage that calls FSP2.0 driver by Andrey Petrov · 8 years ago
  59. 5672dcd soc/intel/apollolake: Add support for memory-mapped boot media by Andrey Petrov · 8 years ago
  60. fb22ff4 drivers/intel/fsp2_0: Add framebuffer graphics support by Alexandru Gagniuc · 8 years ago
  61. 9b2e9bd drivers/intel/fsp2_0: Add hand-off-block parsers by Alexandru Gagniuc · 8 years ago
  62. 9de55cc drivers/intel/fsp2_0: Add Notify Phase API by Andrey Petrov · 8 years ago
  63. 42c4e88 drivers/intel/fsp2_0: Add SiliconInit API by Andrey Petrov · 8 years ago
  64. 465fc13 drivers/intel/fsp2_0: Add MemoryInit API by Andrey Petrov · 8 years ago
  65. 6321d7c roda/rk9: Remove #include early_serial.c from romstage by Antonello Dettori · 8 years ago
  66. 2ae9cce intel/fsp_baytrail: use 20K PU/PD for GPIO by Ben Gardner · 8 years ago
  67. fba78bf soc/intel/quark: Split out MTRR support by Lee Leahy · 8 years ago
  68. 6d3cd08 mainboard/intel/galileo: Enable SD flash cards by Lee Leahy · 8 years ago
  69. f7fd630 tpm/acpi/tpm.asl: Only include tpm.asl if tpm is enabled by Martin Roth · 8 years ago
  70. 73f7069 arch/x86: Add common assembly code for stages that run in CAR by Andrey Petrov · 8 years ago
  71. dd56de9 arch/x86: document CAR symbols and expose them in symbols.h by Andrey Petrov · 8 years ago
  72. bc839fb amd/thatcher: Removed #include early_serial.c from romstage by Antonello Dettori · 8 years ago
  73. 98b5f90 include/device/dram: Fix DDR3-1866 by Patrick Rudolph · 8 years ago
  74. 8e7928a sandybridge/gma_lvds: support both Sandy&Ivy on one board by Iru Cai · 9 years ago
  75. 42f42ff Hide EC_GOOGLE_CHROMEEC_SPI_BUS. by Vladimir Serbinenko · 8 years ago
  76. ca1b2d1 lz4_wrapper: Use __asm__ rather than asm. by Vladimir Serbinenko · 8 years ago
  77. d51a089 Kconfig: hide useless options on ARM. by Vladimir Serbinenko · 8 years ago
  78. 8198c67 arch/x86: always use _start as entry symbol for all stages by Aaron Durbin · 8 years ago
  79. 4330a9c arch/x86: rename reset_vector -> _start by Aaron Durbin · 8 years ago
  80. ccd300b arch/x86: Allow soc/chipset to set linking address by Andrey Petrov · 8 years ago
  81. f8468d4 cpu/x86/16bit: rename _start -> _start16bit by Aaron Durbin · 8 years ago
  82. 0fd068b cpu/x86/16bit/reset16: mark reset vector executable by Aaron Durbin · 8 years ago
  83. 998d856 cpu/x86/16bit/reset16: remove stale 32-bit jump by Aaron Durbin · 8 years ago
  84. 9738970 drivers/intel/fsp2_0: Add utility functions by Andrey Petrov · 8 years ago
  85. b37fd67 drivers/intel/fsp2_0: Add coreboot<->FSP header files by Andrey Petrov · 8 years ago
  86. b97009e nb/intel/sandybridge/raminit: Fill SMBIOS type17 info by Patrick Rudolph · 8 years ago
  87. 0769159 src/device/dram/ddr3: Parse additional information by Patrick Rudolph · 8 years ago
  88. 9f3f915 nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk by Patrick Rudolph · 8 years ago
  89. 2bdeb7f src/arch/x86/smbios: Add vendors by Patrick Rudolph · 8 years ago
  90. 77e45d3 nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic by Patrick Rudolph · 8 years ago
  91. b7e69a2 Skylake: Support Intel Speed Shift Technology based on config by Subrata Banik · 8 years ago
  92. 2a696c0 Skylake boards: Enabling HWP (hardware P state control) by Subrata Banik · 8 years ago
  93. 1e67106 google/chell: Update DPTF configuration by Duncan Laurie · 8 years ago
  94. 4815fb8 google/chell: Update GPIOs for DVT2 by Duncan Laurie · 8 years ago
  95. 1cdacca vboot: Set S3_RESUME flag for vboot context if necessary by Duncan Laurie · 8 years ago
  96. efcddd9 skylake: Increase IGD stolen size to 64MB by Duncan Laurie · 8 years ago
  97. 689b26f mainboard/google/chell: provide configuration for all pads by Aaron Durbin · 8 years ago
  98. a9a06ee mainboard/intel/galileo: Enable USB by Lee Leahy · 8 years ago
  99. 79f065a soc/intel/quark: Reserve non-MMIO space by Lee Leahy · 8 years ago
  100. a6de547 soc/intel/quark: Initialize some of the FADT base registers by Lee Leahy · 8 years ago