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review.coreboot.org / coreboot / refs/heads/main / src / northbridge / intel
  1. 6e8b3c1 src/northbridge: Improve code formatting by Elyes HAOUAS · 8 years ago
  2. 60a6e15 northbridge/intel/x4x: transition away from device_t by Antonello Dettori · 8 years ago
  3. 1004710 northbridge/intel/i5000: transition away from device_t by Antonello Dettori · 8 years ago
  4. 7ea0fe5 northbridge/intel/e7505: transition away from device_t by Antonello Dettori · 8 years ago
  5. 305224f northbridge/intel/fsp_rangeley: transition away from device_t by Antonello Dettori · 8 years ago
  6. 88af372 nb/intel/gm45: Fix DMAR table - IOMMU advertisement for ME interfaces by Damien Zammit · 8 years ago
  7. 614ffc6 nb/intel/x4x: Correct typos in interrupt routing for PEG by Damien Zammit · 8 years ago
  8. a99c64e nb/intel/x4x: Turn on PEG graphics in device enable by Damien Zammit · 8 years ago
  9. 523e90f nb/intel/x4x: Increase MMIO PCI space to 2GiB by Damien Zammit · 8 years ago
  10. 57321db nb/intel/x4x: Fix DMI init by Damien Zammit · 8 years ago
  11. 8ba2010 gm45/gma.c: clean up some registers by Arthur Heymans · 8 years ago
  12. 70f5b82 northbridge/intel/i945: transition away from device_t by Antonello Dettori · 8 years ago
  13. 6fc430b northbridge/intel/sandybridge: transition away from device_t by Antonello Dettori · 8 years ago
  14. 12df950 northbridge/intel: Add required space before opening parenthesis '(' by Elyes HAOUAS · 8 years ago
  15. 874a8f9 i945: Enable changing VRAM size by Arthur Heymans · 8 years ago
  16. 3842498 src/northbridge: Remove unnecessary whitespace before "\n" and "\t" by Elyes HAOUAS · 8 years ago
  17. eff0c6a x4x: make preallocated IGD memory a cmos option by Arthur Heymans · 8 years ago
  18. 27f94ee x4x: add non documented vram sizes by Arthur Heymans · 8 years ago
  19. 0cd338e Remove non-ascii & unprintable characters by Martin Roth · 8 years ago
  20. 15279a9 src/northbridge: Capitalize CPU, RAM and ROM by Elyes HAOUAS · 8 years ago
  21. 0325dc6 bootmode: Get rid of CONFIG_BOOTMODE_STRAPS by Furquan Shaikh · 8 years ago
  22. 7c2e539 nb/intel/x4x: Fix CAS latency detection and max memory detection by Damien Zammit · 8 years ago
  23. 9551bed intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE by Kyösti Mälkki · 8 years ago
  24. b921725 nb/intel/x4x: Fix CAS latency detection by Damien Zammit · 8 years ago
  25. df6eb79 intel/x4x: Do not use scratchpad register for ACPI S3 by Kyösti Mälkki · 8 years ago
  26. 32a38ee intel/pineview: Do not use scratchpad register for ACPI S3 by Kyösti Mälkki · 8 years ago
  27. 4dc680a nb/intel/pineview/northbridge.c: Remove legacy_hole_size_k declaration by Jonathan Neuschäfer · 8 years ago
  28. 9ae0985 nb/intel/x4x: Fix underclocking of 800MHz DDR2 RAM by Damien Zammit · 8 years ago
  29. e4da9aa intel/sandybridge: read correct leaf for cpu family by Ryan Salsamendi · 8 years ago
  30. e6b5a4f intel/i945: Use common ACPI S3 recovery by Kyösti Mälkki · 8 years ago
  31. 0306e6a intel/sandybridge: Fix builds with System Agent blob by Kyösti Mälkki · 8 years ago
  32. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 8 years ago
  33. 75d139b intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 8 years ago
  34. 55409eb nb/intel/sandybridge/raminit: Use supported CAS by Patrick Rudolph · 8 years ago
  35. d4c53e3 nb/intel/sandybridge/raminit: Do code cleanup by Patrick Rudolph · 8 years ago
  36. b7b1b28 nb/intel/sandybridge/raminit: Do code cleanup by Patrick Rudolph · 8 years ago
  37. 7bddd30 nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices by Patrick Rudolph · 8 years ago
  38. d72cc41 intel/model_206ax: Move platform specific defines by Kyösti Mälkki · 8 years ago
  39. a969ed3 Move definitions of HIGH_MEMORY_SAVE by Kyösti Mälkki · 8 years ago
  40. 266a1f7 nb/intel/raminit (native): Read PCI mmio size from devicetree by Patrick Rudolph · 8 years ago
  41. bb9c90a nb/intel: Factor out common MRC code by Patrick Rudolph · 8 years ago
  42. 68e1dcf nb/intel/x4x: Fix unpopulated value by Damien Zammit · 8 years ago
  43. 7afcfe0 gm45: enable setting all vram sizes from cmos by Arthur Heymans · 8 years ago
  44. a090ae0 nb/intel/x4x: Add DMI/EP init by Damien Zammit · 8 years ago
  45. 8f3aaa8 Fix leaking CONFIG_VGA=y by Kyösti Mälkki · 8 years ago
  46. 4bab6e7 intel/sch: Merge northbridge and southbridge in src/soc by Stefan Reinauer · 8 years ago
  47. 66fbeae intel/pineview: Don't try to store 34 bits in 32 by Stefan Reinauer · 8 years ago
  48. 9c9bde3 nb/intel/sandybridge/raminit: support calling dram_freq multiple times by Patrick Rudolph · 8 years ago
  49. 2ccb74b nb/intel/sandybridge/raminit: add additional fallbacks by Patrick Rudolph · 8 years ago
  50. 1e302cb nb/intel/gm45: Fix native text mode initialization by Nick High · 8 years ago
  51. 588ccaa nb/intel/sandybridge/raminit: fix regression "always use mrccache" by Patrick Rudolph · 8 years ago 4.4 4.4
  52. 56abd4d nb/intel/sandybridge/raminit: always use mrccache by Patrick Rudolph · 8 years ago
  53. 31d1959 nb/intel/sandybridge/raminit: die in toplevel function by Patrick Rudolph · 8 years ago
  54. 24a845b nb/intel/sandybridge/raminit: prepare raminit for fallback by Patrick Rudolph · 8 years ago
  55. 27e085a nb/intel/sandybridge/raminit: move ram training into seperate function by Patrick Rudolph · 8 years ago
  56. 735ecce nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing by Patrick Rudolph · 8 years ago
  57. 264bf0b cpu/x86/mtrr: move cache_ramstage() to its only user by Aaron Durbin · 8 years ago
  58. 2510e2a northbridge/intel/i3100: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  59. e3fd63f northbridge/intel/i82810: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  60. 63db614 northbridge/intel/i82830: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  61. 92fc072 northbridge/intel: move mrccache.c of sandybridge + haswell to common by Alexander Couzens · 8 years ago
  62. 81c5c76 northbridge/intel: move mrc_cache definition into a common header by Alexander Couzens · 8 years ago
  63. f0ab23c nortbridge/sandybridge/mrccache: parse the return code of flash->write by Alexander Couzens · 8 years ago
  64. c7a1a3e northbridge/i945/gma: Re-enable NVRAM tft_brightness by Alexander Couzens · 8 years ago
  65. 3d840d0 northbridge/intel/i440bx: Unify UDELAY selection by Stefan Reinauer · 8 years ago
  66. 0819a47 northbridge/intel/gm45: Use TSC for ramstage timer per default by Stefan Reinauer · 8 years ago
  67. 8e7928a sandybridge/gma_lvds: support both Sandy&Ivy on one board by Iru Cai · 9 years ago
  68. b97009e nb/intel/sandybridge/raminit: Fill SMBIOS type17 info by Patrick Rudolph · 8 years ago
  69. 9f3f915 nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk by Patrick Rudolph · 8 years ago
  70. 77e45d3 nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic by Patrick Rudolph · 8 years ago
  71. d7ee9dd northbridge/intel: add missing #include guards by Iru Cai · 8 years ago
  72. d912f1d nb/intel/sandybridge/raminit: Adjust timB to prevent overflow by Patrick Rudolph · 8 years ago
  73. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  74. bd1fdc6 nb/intel/sandybridge/raminit: Add XMP support by Patrick Rudolph · 8 years ago
  75. a649a54 nb/intel/sandybridge/raminit: Improve logging by Patrick Rudolph · 8 years ago
  76. e4f9d5c nb/intel/sandybridge: Start PEG link training by Patrick Rudolph · 9 years ago
  77. e8e66f4 southbridge/intel/bd82x6x: Use common gpio.c by Patrick Rudolph · 8 years ago
  78. 0188b13 nb/intel/sandybridge/raminit: Add shift offset by Patrick Rudolph · 8 years ago
  79. bd82d18 sandybridge: Always include MRC if not using native RAM init. by Vladimir Serbinenko · 8 years ago
  80. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  81. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  82. 59ff340 Kconfig: Move defaults for CBFS_SIZE by Martin Roth · 8 years ago
  83. b2eea81 sandybridge: Set all native gfx-related options in northbridge code. by Vladimir Serbinenko · 8 years ago
  84. 609bd94 ivy: Add a possiblity for mainboard early init. by Vladimir Serbinenko · 8 years ago
  85. 2dc15e9 Revert "northbridge/intel/peg: Disable unused ports" by Nico Huber · 8 years ago
  86. 0e06f5b northbridge/intel/peg: Disable unused ports by Patrick Rudolph · 9 years ago
  87. a1c3bed nb/intel/sandybridge/raminit: Fix two dimms per channel by Patrick Rudolph · 8 years ago
  88. 3141eac Revert "northbridge/intel/sandybridge: Fix random raminit failures" by Vladimir Serbinenko · 8 years ago
  89. 5680faf nb/intel/x4x: Move to early cbmem by Damien Zammit · 8 years ago
  90. 216fc50 nb/intel/x4x: Cleanup gma.c by Damien Zammit · 8 years ago
  91. d63115d nb/intel/x4x: Tidy up raminit and fix msbpos() function by Damien Zammit · 8 years ago
  92. fe9876a nb/intel/x4x: Tidy up northbridge by Damien Zammit · 8 years ago
  93. 9fb08f5 nb/intel/x4x: Fix memory hole with both channels populated by Damien Zammit · 8 years ago
  94. 51fdb92 nb/intel/pineview: Native VGA init (CRT) by Damien Zammit · 8 years ago
  95. 2cfab90 nb/intel/pineview: Increase MMCONF decoding to 256 busses by Damien Zammit · 8 years ago
  96. 02f4764 nb/intel/pineview: Use macro names for memory base registers by Damien Zammit · 8 years ago
  97. f564606 nb/intel/pineview: Fix decode_pciebar() by Damien Zammit · 8 years ago
  98. fd277d8 header files: Fix guard name comments to match guard names by Martin Roth · 8 years ago
  99. 7e513d1 intel/sandybridge/raminit: fix ODT setting by Patrick Rudolph · 8 years ago
  100. b851cc6 nb/intel/gm45: Backport configuration of panel power timings by Nico Huber · 8 years ago