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review.coreboot.org / coreboot / refs/heads/main / src / northbridge / intel / haswell / northbridge.c
  1. bfb11be include/device/device.h: Remove CHIP_NAME() macro by Nicholas Sudsgaard · 5 months ago
  2. 0b0113f device/device.h: Rename pci_domain_scan_bus by Arthur Heymans · 10 months ago
  3. a5543ae nb/haswell: Use newer function for resource declarations by Arthur Heymans · 1 year ago
  4. 7cba1c4 treewide: Remove duplicated include <device/pci.h> by Elyes Haouas · 1 year, 5 months ago
  5. dd96ab6 cpu/intel/haswell: Move chip_ops to cpu cluster by Arthur Heymans · 2 years, 8 months ago
  6. 600fa26 nb/intel/haswell: Hook up PCI domain and CPU cluster ops to devicetree by Arthur Heymans · 1 year, 8 months ago
  7. 61ed4ef treewide: use predicate to check if pci device is on n-th bus by Fabio Aiuto · 1 year, 9 months ago
  8. 0a18d64 nb,soc/intel: Handle upper RAM boundary by Kyösti Mälkki · 3 years ago
  9. 4e4edf7 device/resource: Modify some resource allocation instances by Kyösti Mälkki · 2 years, 1 month ago
  10. 27d6299 device/resource: Add _kb postfix for resource allocators by Kyösti Mälkki · 2 years, 1 month ago
  11. 43b7f41 src: Make PCI ID define names shorter by Felix Singer · 2 years, 4 months ago
  12. 7f5a1ee Spell *Boot Guard* with a space for official spelling by Paul Menzel · 2 years, 7 months ago
  13. abe5632 nb/intel/haswell/northbridge.c: Drop stale comment by Angel Pons · 2 years, 8 months ago
  14. 50863da src/mainboard to src/security: Fix spelling errors by Martin Roth · 2 years, 9 months ago
  15. 3eeefba nb/intel/haswell/memmap.h: Define MMIO window sizes by Angel Pons · 3 years, 1 month ago
  16. 0acfe22 nb/intel: Replace remaining BAR accessors by Angel Pons · 3 years, 3 months ago
  17. 2e397ae nb/intel/haswell: Use new fixed BAR accessors by Angel Pons · 3 years, 3 months ago
  18. 7adfe80 nb/intel/haswell: Replace `DMIBAR64` and `EPBAR64` by Angel Pons · 3 years, 3 months ago
  19. 34be1be nb/intel/haswell: Finalize northbridge in ramstage by Angel Pons · 3 years, 4 months ago
  20. 30c5e60 nb/intel/haswell: Indent PCI ops with tabs by Angel Pons · 3 years, 4 months ago
  21. a8f7690 nb/intel/haswell: Fix DPR size handling by Tim Wawrzynczak · 3 years, 4 months ago
  22. 5d7c3a4 nb/intel/haswell/northbridge.c: Correct DPR handling by Angel Pons · 3 years, 8 months ago
  23. 805ff57 nb/intel/haswell: Drop incorrect MMIO_PAVP_MSG write by Angel Pons · 3 years, 8 months ago
  24. 030d338 nb/intel: Add missing <types.h> by Elyes HAOUAS · 3 years, 5 months ago
  25. 11c6b8b nb,soc/intel: Switch to CHROMEOS_RAMOOPS_DYNAMIC by Kyösti Mälkki · 3 years, 5 months ago
  26. b8b4133 nb/intel/sandybridge,haswell: Use chromeos_reserve_ram_oops() by Kyösti Mälkki · 3 years, 5 months ago
  27. f95b9b4 nb/intel/haswell: Use common {DMI,EP,MCH}BAR accessors by Angel Pons · 3 years, 6 months ago
  28. 6e732d3 intel: Turn `DEFAULT_RCBA` into a Kconfig symbol by Angel Pons · 3 years, 5 months ago
  29. 32770f8 nb/intel/haswell: Define and use MMCONF_BUS_NUMBER by Angel Pons · 3 years, 6 months ago
  30. e2ec60f nb/intel/haswell/haswell.h: Do not include `pch.h` by Angel Pons · 3 years, 5 months ago
  31. f5dd7b6 {cpu,nb}/intel/haswell: Drop unnecessary `UL` suffix by Angel Pons · 3 years, 8 months ago
  32. 7bbf45e nb/intel/haswell: Generalise northbridge chip name by Angel Pons · 3 years, 9 months ago
  33. 76b8bc2 nb/intel/haswell: Set up Root Complex topology by Angel Pons · 4 years ago
  34. 4b290b7 nb/intel/haswell: Account for DPR region in memory map by Angel Pons · 3 years, 9 months ago
  35. f4fa1e1 nb/intel/haswell: Deduplicate PCIEXBAR decoding by Angel Pons · 4 years ago
  36. 12a13e1 nb/intel/haswell: Add Crystal Well PCI IDs by Iru Cai · 4 years, 1 month ago
  37. 028b8e4 nb/intel/haswell: Configure VCs on Egress Port by Angel Pons · 4 years ago
  38. 598ec6a nb/intel/haswell: Enable DMI ASPM by Angel Pons · 4 years ago
  39. 1fc0edd src: Use pci_dev_ops_pci where applicable by Angel Pons · 4 years, 1 month ago
  40. abf51ab src: Remove unused '#include <cpu/x86/smm.h>' by Elyes HAOUAS · 4 years, 1 month ago
  41. 5cb34e2 device/pci_device: Extract pci_domain_set_resources from SOC by Raul E Rangel · 4 years, 2 months ago
  42. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  43. d8abb26 nb/intel/haswell/northbridge.c: Fix typo by Angel Pons · 4 years, 2 months ago
  44. 76cedd2 acpi: Move ACPI table support out of arch/x86 (3/5) by Furquan Shaikh · 4 years, 2 months ago
  45. 2f8ba69 Replace DEVICE_NOOP with noop_(set|read)_resources by Nico Huber · 4 years, 3 months ago
  46. a461b69 Drop unnecessary DEVICE_NOOP entries by Nico Huber · 4 years, 3 months ago
  47. 4b42983 src/northbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  48. deeccbf Drop explicit NULL initializations from `device_operations` by Elyes HAOUAS · 4 years, 3 months ago
  49. 68680dd Trim `.acpi_fill_ssdt_generator` and `.acpi_inject_dsdt_generator` by Nico Huber · 4 years, 3 months ago
  50. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  51. 1db5bc7 nb/intel/haswell: Tidy up code and comments by Angel Pons · 4 years, 6 months ago
  52. dc987fe src/northbridge: Remove unused <stdlib.h> by Elyes HAOUAS · 4 years, 7 months ago
  53. 442fb05 nb/{haswell,i945,sandybridge}: Drop outdated comment by Elyes HAOUAS · 4 years, 7 months ago
  54. b3267e0 cpu/intel: Replace bsp_init_and_start_aps() by Kyösti Mälkki · 5 years ago
  55. 4a0f071 {northbridge, soc, southbridge}/intel: Make use of pci_dev_set_subsystem() by Subrata Banik · 5 years ago
  56. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  57. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  58. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  59. e737755 device: Use pcidev_path_on_root() by Kyösti Mälkki · 6 years ago
  60. c70eed1 device: Use pcidev_on_root() by Kyösti Mälkki · 6 years ago
  61. c5d367b nb/intel/haswell: Handle boards that do not support IGD by Tristan Corrick · 6 years ago
  62. bc896cd nb/intel/haswell: Use DEVEN to disable devices by Tristan Corrick · 6 years ago
  63. 0766c98 nb/intel/haswell: Add server processor host bridge device ID by Iru Cai · 6 years ago
  64. 8a5283a src: Remove unneeded include <cbmem.h> by Elyes HAOUAS · 6 years ago
  65. d2b9ec1 src: Remove unneeded include "{arch,cpu}/cpu.h" by Elyes HAOUAS · 6 years ago
  66. d385624 nb/intel/haswell: Consolidate memory controller PCI driver structs by Tristan Corrick · 6 years ago
  67. f3127d4 sb/intel/lynxpoint: Automatically generate the ACPI PCI routing table by Tristan Corrick · 6 years ago
  68. 4817012 nb/intel/haswell: Add a PCI ID for a desktop memory controller by Tristan Corrick · 6 years ago
  69. b60920d northbridge: Use 'unsigned int' to bare use of 'unsigned' by Elyes HAOUAS · 6 years ago
  70. f369e60 northbridge/intel: Remove unneeded includes by Elyes HAOUAS · 6 years ago
  71. 77f7a6e nb/intel/haswell: Get rid of device_t by Elyes HAOUAS · 6 years ago
  72. 3de3031 {mb,nb,soc}: Remove references to pci_bus_default_ops() by Nico Huber · 6 years ago
  73. a51e379 nb/intel/haswell;sb/intel/lynxpoint: Enable VT-d and X2APIC by Matt DeVillier · 6 years ago
  74. 85d98d9 nb/intel/haswell: Generate ACPI DMAR table by Matt DeVillier · 6 years ago
  75. fa0725d northbridge/intel/haswell: Fix undefined behavior by Ryan Salsamendi · 7 years ago
  76. 3323260 nb/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  77. 6d0c65e nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h> by Arthur Heymans · 7 years ago
  78. 6e8b3c1 src/northbridge: Improve code formatting by Elyes HAOUAS · 8 years ago
  79. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  80. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  81. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 9 years ago
  82. 9f74462 northbridge/intel: Use DEVICE_NOOP macro over dummy symbol by Edward O'Callaghan · 10 years ago
  83. 0a66991 acpi: Remove explicit pointer tracking in per-device ssdt. by Vladimir Serbinenko · 10 years ago
  84. c6e566a haswell: Move to per-device ACPI by Vladimir Serbinenko · 10 years ago
  85. 6a36004 haswell: backup the default SMM region on resume by Aaron Durbin · 10 years ago
  86. cb08e16 CBMEM intel: Define get_top_of_ram() once per chipset by Kyösti Mälkki · 11 years ago
  87. 118d105 haswell: Export functions for CPU family+model and stepping by Duncan Laurie · 11 years ago
  88. c70353f haswell: Misc power management setup and fixes by Duncan Laurie · 11 years ago
  89. 697927c CBMEM: Define cbmem_top() just once for x86 by Kyösti Mälkki · 11 years ago
  90. 872c922 Fix MMCONF_SUPPORT_DEFAULT for ramstage by Kyösti Mälkki · 11 years ago
  91. 27435d3 haswell: fix overflow handling TOUUD by Aaron Durbin · 11 years ago
  92. 243aa44 boot: remove cbmem_post_handling() by Aaron Durbin · 11 years ago
  93. c965076 resources: introduce reserved_ram_resource() by Aaron Durbin · 11 years ago
  94. c0cbd6e haswell: use dynamic cbmem by Aaron Durbin · 11 years ago
  95. dd4a6d2 coreboot: dynamic cbmem requirement by Aaron Durbin · 11 years ago
  96. bf396ff haswell: use s3_resume field in romstage_handoff by Aaron Durbin · 11 years ago
  97. 605ca1b haswell: cbmem_get_table_location() implementation by Aaron Durbin · 11 years ago
  98. 21efd8c haswell: fix ACPI MCFG table by Aaron Durbin · 11 years ago
  99. 7af2069 haswell: enable caching before SMM initialization by Aaron Durbin · 11 years ago
  100. e6c3b1d haswell: include TSEG region in cacheable memory by Aaron Durbin · 12 years ago