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review.coreboot.org / coreboot / f1b58b78351d7ed220673e688a2f7bc9e96da4e2 / src / southbridge / intel / bd82x6x / early_me.c
  1. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  2. 19ea62e southbridge: Remove useless include <device/pci_ids.h> by Elyes HAOUAS · 6 years ago
  3. 14604da sb/intel/{bd82x6x,ibexpeak}: Fix out of bounds access in intel_me_status() by Nicola Corna · 6 years ago
  4. d7e0cb9 sb/intel/bd82x6x: Add awareness of ME's Alt Disable Mode by Nathaniel Roach · 7 years ago
  5. 52f0871 sb/intel/bd82x6x: Add time-stamp around ME DRAM update by Nathaniel Roach · 7 years ago
  6. d45114f intel PCI ops: Remove explicit PCI MMCONF access by Kyösti Mälkki · 11 years ago
  7. 1bcd7fc src/southbridge: Capitalize CPU, RAM and ROM by Elyes HAOUAS · 8 years ago
  8. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  9. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago
  10. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  11. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  12. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  13. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago