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review.coreboot.org / coreboot / ed7e29e6202485ba7b4f27bd415c891abdbb9f1d / src / northbridge / intel
  1. ed7e29e Lenovo ThinkPad X60: Add Native VGA init. by Denis 'GNUtoo' Carikli · 11 years ago
  2. c6f2722 sandybridge: enable ROM caching by Aaron Durbin · 11 years ago
  3. f567f16 sandybridge: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  4. fcfe67c haswell: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  5. bb4e79a x86: add new mtrr implementation by Aaron Durbin · 11 years ago
  6. c965076 resources: introduce reserved_ram_resource() by Aaron Durbin · 11 years ago
  7. c0cbd6e haswell: use dynamic cbmem by Aaron Durbin · 11 years ago
  8. dd4a6d2 coreboot: dynamic cbmem requirement by Aaron Durbin · 11 years ago
  9. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  10. 467f31d haswell/lynxpoint: Use new PCH/PM helper functions by Duncan Laurie · 11 years ago
  11. 969ac8d haswell: Drop the device ID check in graphics init path by Duncan Laurie · 11 years ago
  12. 8ce667e haswell: add multipurpose SMM memory region by Aaron Durbin · 12 years ago
  13. bf396ff haswell: use s3_resume field in romstage_handoff by Aaron Durbin · 12 years ago
  14. 605ca1b haswell: cbmem_get_table_location() implementation by Aaron Durbin · 12 years ago
  15. 0013a69 haswell: drop memory reservation for sandybridge GPU bug by Duncan Laurie · 11 years ago
  16. 2ad1dba haswell: move call site of save_mrc_data() by Aaron Durbin · 12 years ago
  17. 9b7f9b9 haswell: remove unused sys_info structure by Aaron Durbin · 12 years ago
  18. 3d0071b haswell: adjust CAR usage by Aaron Durbin · 12 years ago
  19. 21efd8c haswell: fix ACPI MCFG table by Aaron Durbin · 12 years ago
  20. 7af2069 haswell: enable caching before SMM initialization by Aaron Durbin · 12 years ago
  21. 239c2e8 haswell platforms: restructure romstage main by Aaron Durbin · 12 years ago
  22. e6c3b1d haswell: include TSEG region in cacheable memory by Aaron Durbin · 12 years ago
  23. 86a1110 i945: Replace some two magic values by defined names by Patrick Georgi · 11 years ago
  24. 5c66f08 haswell: don't add a 0-sized memory range resource by Aaron Durbin · 12 years ago
  25. 69efaa0 Google Link: Add remaining code to support native graphics by Ronald G. Minnich · 11 years ago
  26. 1570260 haswell: Fix BDSM and BGSM indicies in memory map by Aaron Durbin · 12 years ago
  27. 1fef1f5 haswell: reserve default SMRAM space by Aaron Durbin · 12 years ago
  28. c12ef97 haswell: resource allocation by Aaron Durbin · 12 years ago
  29. 26e7dd7 haswell: more ULT/LP support and minor tweaks by Duncan Laurie · 12 years ago
  30. 7116129 haswell: Add VGA PCI ID mappings by Aaron Durbin · 12 years ago
  31. df7be71 haswell: Add ULT device IDs by Duncan Laurie · 12 years ago
  32. f72ad02 graysreef: update platform information by Aaron Durbin · 12 years ago
  33. 89f79a0 haswell: remove explicit pcie config accesses by Aaron Durbin · 12 years ago
  34. c1989c4 haswell: add PCI id support by Aaron Durbin · 12 years ago
  35. b6b5aa1 haswell: Remove logic to send dram init done to ME by Aaron Durbin · 12 years ago
  36. 30c3900 haswell: notes and updates. by Aaron Durbin · 12 years ago
  37. 8256a9b haswell: align pei_data structure with intel-framework by Aaron Durbin · 12 years ago
  38. b9adf7b haswell: use #defines for constants in udelay.c by Aaron Durbin · 12 years ago
  39. ce36b12 haswell: Add LPT LP device IDs to platform report by Duncan Laurie · 12 years ago
  40. 67113e9 haswell: Update GPU power management setup by Duncan Laurie · 12 years ago
  41. 6d04f0f haswell: always use MMIO PCI config accesses by Aaron Durbin · 12 years ago
  42. 76c3700 haswell: Add initial support for Haswell platforms by Aaron Durbin · 12 years ago
  43. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  44. 41dd3db Intel e7505: provide get_top_of_ram by Kyösti Mälkki · 12 years ago
  45. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  46. fd611f9 Drop CONFIG_WRITE_HIGH_TABLES by Stefan Reinauer · 11 years ago
  47. 0aa37c4 sconfig: rename lapic_cluster -> cpu_cluster by Stefan Reinauer · 12 years ago
  48. 4aff445 sconfig: rename pci_domain -> domain by Stefan Reinauer · 12 years ago
  49. 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 12 years ago
  50. 8cc8468 Intel: Replace MSR 0xcd with MSR_FSB_FREQ by Patrick Georgi · 12 years ago
  51. 6fe0cab Extend CBFS to support arbitrary ROM source media. by Hung-Te Lin · 12 years ago
  52. 816e9d1 Support for Celeron 1007U by Stefan Reinauer · 12 years ago
  53. 5079a0d Remove assembly coded log2 function by Ronald G. Minnich · 12 years ago
  54. 721265b Drop driver-y from GM45/ICH9/RK9 by Stefan Reinauer · 12 years ago
  55. e135ac5 Remove AMD special case for LAPIC based udelay() by Patrick Georgi · 12 years ago
  56. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  57. 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago
  58. 3c84261 yabel: Use X86_* instead of the more verbose M.x86.REG_* by Patrick Georgi · 12 years ago
  59. 6446626 Use new system agent binaries by Stefan Reinauer · 12 years ago
  60. 313ec9d Sandybridge: Set PEG clock gating by Marc Jones · 12 years ago
  61. 7e8c8e9 Add PCIe init and NMode flag to PEI data structure by Stefan Reinauer · 12 years ago
  62. e8179b5 Add ddr3lv_support flag to pei_data structure by Duncan Laurie · 12 years ago
  63. 53508fe pei_data.h: Fix comment by Marc Jones · 12 years ago
  64. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 12 years ago
  65. e5a0a5d Initial IGD OpRegion implementation by Stefan Reinauer · 12 years ago
  66. ad67791 Avoid using hardcoded values in MRC cache code by Vadim Bendebury · 12 years ago
  67. a1ea822 Make coreboot use the offset parameter in cbfstool create by Stefan Reinauer · 12 years ago
  68. 4c8027a Make register/value lists const by Stefan Reinauer · 12 years ago
  69. 357bb2d SandyBridge/IvyBridge: Use flash map to find MRC cache by Stefan Reinauer · 12 years ago
  70. c6b9f92 Add missing newline in error message by Stefan Reinauer · 12 years ago
  71. cf81b82 CMOS: Move MRC seed offset into upper bank by Duncan Laurie · 12 years ago
  72. 1e0ddf6 Fix some issues with new "reference" toolchain by Stefan Reinauer · 12 years ago
  73. 3e9155d northbridge/sch: move the \n so it reads a little better by Sebastian Andrzej Siewior · 12 years ago
  74. 59e3e02 northbridge/sch: read the size of main memory from the proper register by Sebastian Andrzej Siewior · 12 years ago
  75. 50dd47b northbridge/sch: Read the GPU memory from the correct PCI device by Sebastian Andrzej Siewior · 12 years ago
  76. 66fa9e2 northbridge/sch: don't overwrite hightables with GPU / TSEG memory by Sebastian Andrzej Siewior · 12 years ago
  77. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 12 years ago
  78. 72cee54 HAVE_HIGH_TABLES is gone by Patrick Georgi · 12 years ago
  79. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  80. 7874e9d Sandybridge: Fix integer overrun in romstage udelay() by Stefan Reinauer · 12 years ago
  81. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  82. 9ca1c0a Sandy/Ivy Bridge and Cougar/Panther Point: Fix names by Stefan Reinauer · 12 years ago
  83. 5e29f00 Intel and GFXUMA: drop redundant use of lb_add_memory_range() by Kyösti Mälkki · 12 years ago
  84. 7f189cc Intel Sandybridge and UMA: use mmio_resource() by Kyösti Mälkki · 12 years ago
  85. 1ec5e74 Intel Sandybridge: add reserved memory as resources by Kyösti Mälkki · 12 years ago
  86. d4ee808 sandybridge: reinitialize usbdebug after MRC by Sven Schnelle · 12 years ago
  87. 6ff1d36 Intel and GFXUMA: fix MTRR and use uma_resource() by Kyösti Mälkki · 12 years ago
  88. 08ef498 Intel 82810 and 82830: always room for PCI memory by Kyösti Mälkki · 12 years ago
  89. b5f5652 Intel i945 and sch: no memory over 4GB by Kyösti Mälkki · 12 years ago
  90. efff733 Refactor driver structs by Patrick Georgi · 12 years ago
  91. 1b3207e CTDP: Only do TDP down/nominal change from TNP0 by Duncan Laurie · 12 years ago
  92. 55864ef ACPI: Add support for runtime config TDP down by Duncan Laurie · 12 years ago
  93. f4d3623 ELOG: Add support for a monotonic boot counter in CMOS by Duncan Laurie · 12 years ago
  94. 696262b More descriptive error messages in Sandybridge raminit code by Stefan Reinauer · 12 years ago
  95. 9c4c6ab ELOG: Fix boot count increment for non-wake case by Duncan Laurie · 12 years ago
  96. fe7b5d2 Ivybridge: fix workaround and enable PAIR by Duncan Laurie · 12 years ago
  97. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
  98. b91a0f2 Rename cache_lbmem() to cache_ramstage() by Stefan Reinauer · 12 years ago
  99. 6097e19 Make ACPI code detect Sandy/Ivy Bridge dynamically by Stefan Reinauer · 12 years ago
  100. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago