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review.coreboot.org / coreboot / e56189cfd1d90a2ca13650a9d21ff82cb79ccda8 / src / southbridge / intel / bd82x6x / lpc.c
  1. e56189c pci: Move inline PCI functions to pci_ops.h by Patrick Rudolph · 6 years ago
  2. 8e50b6d sb/intel/bd82x6x: Let mainboard override SPI opmenu by Nico Huber · 7 years ago
  3. a050817 sb/intel/common: Add common code for SMM setup and smihandler by Arthur Heymans · 7 years ago
  4. d2d2aef sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location by Arthur Heymans · 7 years ago
  5. 7f5efd9 intel/bd82x6x: Use generated ACPI PIRQ by Tobias Diedrich · 7 years ago
  6. 97620038 southbridge/intel/bd82x6x: refactor rtc failure checking by Aaron Durbin · 7 years ago
  7. aa090cb device: acpi_name() should take a const struct device by Aaron Durbin · 7 years ago
  8. d533b16 sb/intel/*: add option to lockdown chipset on normal boot path by Bill XIE · 7 years ago
  9. 7a1a3ad southbridge/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  10. 604f698 sb/intel/bd82x6x: Fill in acpi_name by Patrick Rudolph · 7 years ago
  11. 281ccca nb/intel/sandybridge/gma: Set up OpRegion in nb code by Patrick Rudolph · 7 years ago
  12. 035df00 src/southbridge: Remove whitespace after sizeof by Elyes HAOUAS · 8 years ago
  13. ba28e8d src/southbridge: Code formating by Elyes HAOUAS · 8 years ago
  14. 42d55e0 sb/intel/bd82x6x: Add missing PCIIDs for variants . by Vladimir Serbinenko · 9 years ago
  15. b2dae79 sb/intel/bd82x6x: Assign unique bus/dev/fn for I/O APIC + HPETs by Nico Huber · 9 years ago
  16. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  17. 7b2f9f6 intel/southbridge/bd82x6x: Add option to set SPI VSCC registers by Nico Huber · 9 years ago
  18. 5eea458 device_ops: add device_t argument to acpi_fill_ssdt_generator by Alexander Couzens · 9 years ago
  19. a90dad1 device_ops: add device_t argument to acpi_inject_dsdt_generator by Alexander Couzens · 9 years ago
  20. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  21. b06a249 bd82x6x: Move calling of finalize() on resume to southbridge code by Vladimir Serbinenko · 9 years ago
  22. a3e41c0 Migrate 206ax to SMM_MODULES by Vladimir Serbinenko · 9 years ago
  23. dd2bc3f igd.asl rewrite by Vladimir Serbinenko · 10 years ago
  24. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  25. b85a87b intel SMI handlers: Refactor GPI SMI/SCI routing by Kyösti Mälkki · 10 years ago
  26. 31ca97c southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipset by Damien Zammit · 9 years ago
  27. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  28. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  29. 36fa5b8 i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplug by Vladimir Serbinenko · 10 years ago
  30. 226d784 ibexpeak, bd82x6x: Move to implicit length patching by Vladimir Serbinenko · 10 years ago
  31. 5b044ae bd82x6x: Move to common FADT. by Vladimir Serbinenko · 10 years ago
  32. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  33. 06c788d bd82x6x: Consolidate common GNVS init by Vladimir Serbinenko · 10 years ago
  34. 334fd8e bd82x6x, ibexpeak, lynxpoint: Declare NVSA before its use. by Vladimir Serbinenko · 10 years ago
  35. 7309c64 bd82x6x, ibexpeak, lynxpoint: Ensure 0-filling of uninited GNVS vars. by Vladimir Serbinenko · 10 years ago
  36. 0650cd0 southbridge/bd82x6x: Reserve 16 MiB for flash and not 8. by Vladimir Serbinenko · 11 years ago
  37. 35c0f43 Move nehalem/sandy/ivy to per-device acpi by Vladimir Serbinenko · 10 years ago
  38. 264d265 southbridge: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  39. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  40. 9c50e6a Intel BD82x6x: LPC: Unify I/O APIC setup by Paul Menzel · 11 years ago
  41. 8c937c7 Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID is 2 by Vladimir Serbinenko · 11 years ago
  42. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  43. a0bec17 Reserve bd82x6x LPC decode ranges in the resource allocator by Marc Jones · 12 years ago
  44. 800e950 ELOG: Log boot-time events found in southbridge by Duncan Laurie · 12 years ago
  45. e6f459c CougarPoint/PantherPoint: Add HM77 device ID to table by Kimarie Hoot · 12 years ago
  46. 3f6a4d7 Add specific power management init code for PantherPoint by Duncan Laurie · 12 years ago
  47. 9a380ab bd82x6x: Convert all PCI ID lists to new scheme by Stefan Reinauer · 12 years ago
  48. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 12 years ago
  49. 95be1d6 Don't disable ACPI in the S3 resume path by Duncan Laurie · 12 years ago
  50. 459b777 add new LPC controller device ID value by Vadim Bendebury · 12 years ago
  51. 8e07382 Add support for Intel Panther Point PCH by Stefan Reinauer · 12 years ago