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review.coreboot.org / coreboot / de77e6a99f37651aefe0abe3015dc7abc5562f54 / src / soc / intel
  1. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  2. d08057a intel/fsp_baytrail: Add PCI Root Port IRQ Routing by Martin Roth · 9 years ago
  3. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  4. 9604474 broadwell: enable PCIe endpoint CLK power management by Kane Chen · 10 years ago
  5. 2c4aab3 coreboot: fix munged license text by Aaron Durbin · 9 years ago
  6. 0f9c9de fsp_baytrail: Add I2C driver by Werner Zeh · 9 years ago
  7. b5a374d fsp_baytrail: Add new microcode for Bay Trail M by Werner Zeh · 9 years ago
  8. 4104e6c x86: Fix pointer arithmetic regressions from MMIO changes by Kevin Paul Herbert · 9 years ago
  9. 21a5309 soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER` by Paul Menzel · 9 years ago
  10. f3a235e intel/broadwell: free local heap object by Patrick Georgi · 9 years ago
  11. eb73a21 soc/fsp_baytrail: Fix use of microcode-related Kconfig variables by Alexandru Gagniuc · 9 years ago
  12. 033bb4b acpi: Generate valid ACPI processor objects by Timothy Pearson · 9 years ago
  13. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  14. 2a84445 fsp_baytrail: Add macros to define 20K pull-up and down by Werner Zeh · 9 years ago
  15. b474abe Baytrail_fsp: Make ME path configurable in menuconfig by Werner Zeh · 9 years ago
  16. 2213843 fsp_baytrail: Get FSP reserved memory from the FSP HOB list by Martin Roth · 10 years ago
  17. cd02ef1 Intel FSP platforms: Fix timestamps by Kyösti Mälkki · 10 years ago
  18. 582b2ae FSP & CBMEM: Fix broken cbmem CAR transition. by Martin Roth · 10 years ago
  19. ae98e83 CBMEM: Always use DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  20. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  21. 0a11a61 CBMEM: Move cbmemc_reinit() by Kyösti Mälkki · 10 years ago
  22. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  23. 374f27b baytrail: there is a chance that USBPHY_COMPBG is set to 0 by Kane Chen · 10 years ago
  24. 314c4c3 baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG by Kane Chen · 10 years ago
  25. 4175927 baytrail broadwell: Use timestamps internal stash by Kyösti Mälkki · 10 years ago
  26. 735e10a soc/intel/fsp_baytrail/gpio.c: Silence unused variable warning by Edward O'Callaghan · 10 years ago
  27. 8cc5dc1 soc/intel/broadwell/me.c: Prevent unused function warning by Edward O'Callaghan · 10 years ago
  28. dd191a2 soc/intel/broadwell/spi_loading.c: Remove dead code by Edward O'Callaghan · 10 years ago
  29. d548e5c broadwell: Use correct include file for console functions by Stefan Reinauer · 10 years ago
  30. 9b29aad Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'" by Kyösti Mälkki · 10 years ago
  31. 5f066b2 doxygen fixes: change @var to @param var by Martin Roth · 10 years ago
  32. 9270553 Re-factor 'to_flash_offset()' into 'spi_flash.h' by Edward O'Callaghan · 10 years ago
  33. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  34. 229958e broadwell: Hook into the build system by Duncan Laurie · 10 years ago
  35. a6354a1 broadwell: Preparations for building by Marc Jones · 10 years ago
  36. d816a02 baytrail: add more gpio init macros by Kane Chen · 10 years ago
  37. 1a3675e baytrail: Add defines and functions for GPNCORE by Kein Yuan · 10 years ago
  38. 4851bf2 intel baytrail broadwell: Include microcode updates by Kyösti Mälkki · 10 years ago
  39. 270e300 fsp_baytrail: Initialize LPC pads in bootblock for port 80 by Martin Roth · 10 years ago
  40. c9be93f fsp_baytrail: Remove GPIO_NC1 #define by Martin Roth · 10 years ago
  41. 002178a baytrail SOCs: Add missing comma in gpio.h by Martin Roth · 10 years ago
  42. 59e209a baytrail: initialize backlight PWM frequency by Aaron Durbin · 10 years ago
  43. f2612a1 x86: Initialize SPI controller explicitly during PCH init by David Hendricks · 10 years ago
  44. 52669ef fsp_baytrail: Add code to read GPIOs in romstage by Martin Roth · 10 years ago
  45. 71b2145 CBMEM console: Fix boards with BROKEN_CAR_MIGRATE by Kyösti Mälkki · 10 years ago
  46. 13a845a Intel FSP: Move to DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  47. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  48. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 10 years ago
  49. a0a71b0 fsp platfoms: add prototype & consolidate main entry-point by Martin Roth · 10 years ago
  50. 99a3bba intel/baytrail: Spelling fixes by Martin Roth · 10 years ago
  51. 7c96629 intel/fsp_baytrail: Spelling fixes by Martin Roth · 10 years ago
  52. de7ed6f intel/broadwell: Spelling fixes by Martin Roth · 10 years ago
  53. 59bff09 fsp_baytrail: Update function disable code by Martin Roth · 10 years ago
  54. bc78fcf fsp_baytrail: Kconfig update for Gold 3 FSP by Martin Roth · 10 years ago
  55. bb27316 fsp_baytrail: Update microcode for Gold 3 FSP release by Martin Roth · 10 years ago
  56. e10108a FSP platform microcode: Update to remove Kconfig variable by Martin Roth · 10 years ago
  57. 30eda3e fsp_baytrail: remove register option for TSEG size by Martin Roth · 10 years ago
  58. bdfe98f fsp_baytrail: update printk to use FSP_INFO_LEVEL by Martin Roth · 10 years ago
  59. 12d86e7 fsp_baytrail: update for UPD_DEVICE_CHECK macro by Martin Roth · 10 years ago
  60. 5c8e7a4 fsp_baytrail: update to add the UPD_MEMDOWN_CHECK macro by Martin Roth · 10 years ago
  61. 8d936ce fsp_baytrail: update for UPD_SPD_CHECK macro by Martin Roth · 10 years ago
  62. e8d1901 fsp_baytrail: update to add the UPD_DEFAULT_CHECK macro by Martin Roth · 10 years ago
  63. 546953c Replace hlt with halt() by Patrick Georgi · 10 years ago
  64. 796fe06 Mark non-executable files non-executable by Patrick Georgi · 10 years ago
  65. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  66. 24d875b ACPI: Remove CBMEM TOC from GNVS by Kyösti Mälkki · 10 years ago
  67. 609d22f intel: Remove IRQ1 from possible PIRQ assignemnt. by Vladimir Serbinenko · 10 years ago
  68. c7e6cae intel/fsp_baytrail: add new CPUID for Baytrail I step D0 by Herve ELter · 10 years ago
  69. fc1c1b5 intel/fsp_baytrail: add Gold3 FSP support by York Yang · 10 years ago
  70. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 10 years ago
  71. b219da8 broadwell: move to per-device ACPI. by Vladimir Serbinenko · 10 years ago
  72. 91050b7 fsp_baytrail: Fix ACPI 'Object is not referenced' warnings by Martin Roth · 10 years ago
  73. e55a7c5 fsp_baytrail: Update chip.h UPD entries to match names in fspvpd.h by Martin Roth · 10 years ago
  74. 04f68c1 baytrail: fix range check by Patrick Georgi · 10 years ago
  75. 0a1699e intel: use crosscompiler readelf, instead of global by Patrick Georgi · 10 years ago
  76. 48b6b97 src: Too many terminators ';;' at end of stmts, stop Skynet by Edward O'Callaghan · 10 years ago
  77. 986e85c intel: Use 'FORCEWAKE_ACK_HSW' define over '0x130044' by Edward O'Callaghan · 10 years ago
  78. e408dce Redundant addr '&' operator on func ptr's in struct initiator by Edward O'Callaghan · 10 years ago
  79. 0625a8b {cpu,soc}: Use DEVICE_NOOP macro over dummy symbol by Edward O'Callaghan · 10 years ago
  80. dd20d5d baytrail: Remove unused devicetree fields by Shawn Nematbakhsh · 10 years ago
  81. b959079 baytrail: gfx: Don't configure hotplug + backlight registers by Shawn Nematbakhsh · 10 years ago
  82. 787809e Baytrail/dptf: Always return 0 in TCPU._PPC by Kein Yuan · 10 years ago
  83. 1131889 baytrail: handle MRC being an ELF file by Aaron Durbin · 10 years ago
  84. 31ac9e3 baytrail: Configure MSR for 2-core and 4-core P-state configutation by Duncan Laurie · 10 years ago
  85. 89f5292 baytrail: move cache-as-ram base address to 0xfe000000 by Aaron Durbin · 10 years ago
  86. 565d409 baytrail: romstage: Add function to check SW WP status for vboot by Shawn Nematbakhsh · 10 years ago
  87. d2044cc reg_script: default to n for ARCH_X86 by Isaac Christensen · 10 years ago
  88. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  89. 1b969f6 broadwell: Update Haswell and Broadwell E0 microcode by Duncan Laurie · 10 years ago
  90. c093967 broadwell: Update microcode by Duncan Laurie · 10 years ago
  91. 6168027 broadwell: ACPI, romstage, and other updates by Duncan Laurie · 10 years ago
  92. e256295 broadwell: Update D0 microcode to FFFF000E by Duncan Laurie · 10 years ago
  93. 842bcd3 broadwell: Update microcode for supported CPUs by Duncan Laurie · 10 years ago
  94. c88c54c broadwell: add new intel SOC by Duncan Laurie · 10 years ago
  95. f0aaa29 baytrail: Move HDA verb table to Intel SOC common directory by Duncan Laurie · 10 years ago
  96. d8c4f2b baytrail: Move MRC cache code to a common directory by Duncan Laurie · 10 years ago
  97. 3511023 baytrail/rambi: S3 support and other updates by Kein Yuan · 10 years ago
  98. 1729cd8 x86 romstage: Move stack just below RAMTOP by Kyösti Mälkki · 10 years ago
  99. d05d0db haswell baytrail: Enable RELOCATABLE_RAMSTAGE by Kyösti Mälkki · 10 years ago
  100. 8ffc085 intel/fsp_baytrail: Add padding so device_nvs location matches ACPI by Scott Radcliffe · 10 years ago