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review.coreboot.org / coreboot / de77e6a99f37651aefe0abe3015dc7abc5562f54 / src / arch / riscv
  1. f5d7f60 bootblocks: use run_romstage() by Aaron Durbin · 9 years ago
  2. 6bb6a1a qemu-riscv: add preram_cbmem_console by Aaron Durbin · 9 years ago
  3. 04654a2 loaders: add program_loading.h header file by Aaron Durbin · 9 years ago
  4. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  5. a583924 src/arch/*/include/stdint.h: Provide definitions for bool type by Alexandru Gagniuc · 10 years ago
  6. 91fac61 CBMEM: Tidy up CAR migration by Kyösti Mälkki · 10 years ago
  7. 8659e40 CBMEM console: Fix and enhance pre-RAM support by Kyösti Mälkki · 10 years ago
  8. e455425 CBMEM console: Fix CAR migration step by Kyösti Mälkki · 10 years ago
  9. 823edda CBMEM: Implement cbmem_run_init_hooks() stub by Kyösti Mälkki · 10 years ago
  10. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  11. aca2150 UCB RISCV: Switch to DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  12. c3d4998 RISCV: one last little nit to make it build and run by Ronald G. Minnich · 10 years ago
  13. fc5dc1c RISCV: get RISCV to build again by Ronald G. Minnich · 10 years ago
  14. e0e784a Add UCB RISCV support for architecture, soc, and emulation mainboard.. by Ronald G. Minnich · 10 years ago