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review.coreboot.org / coreboot / d773fd370a92a6da2f7dbf91c085eb0df1f6f30d / src / northbridge
  1. d773fd3 Some more DIMM0 related cleanups and deduplication. by Uwe Hermann · 14 years ago
  2. 9bd9a90 Unify DIMM SPD addressing. For Geode, change the by Patrick Georgi · 14 years ago
  3. 607614d Fix/drop some obsolete comments, by Uwe Hermann · 14 years ago
  4. 8c107bc Move DIMM_MAP_LOGICAL to Kconfig. by Patrick Georgi · 14 years ago
  5. e0c0a82 This problem was introduced with by Tobias Diedrich · 14 years ago
  6. c2bf26d Move RCBA defines to northbridge (instead of mainboard) by Patrick Georgi · 14 years ago
  7. f3cce2f MTRR related improvements for AMD family 10h and family 0Fh systems by Scott Duplichan · 14 years ago
  8. 02d66fd1b Make amdk8 printk_raminit() accept just a single string parameter by Peter Stuge · 14 years ago
  9. 7bbd7f2 Move K8_ALLOCATE_IO_RANGE to Kconfig. by Patrick Georgi · 14 years ago
  10. 00e1460 Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c by Patrick Georgi · 14 years ago
  11. eca3280 Add Kconfig CPU speed selection to Geode GX2 boards. by Nils Jacobs · 14 years ago
  12. a1e2c56 Remove banner wrapper function and unify print(k) usage. by Nils Jacobs · 14 years ago
  13. a215b0f Remove some unused code from gx2/raminit.c. by Nils Jacobs · 14 years ago
  14. 5beac7f Clean up some comments and white space in gx2/northbridgeinit.c by Nils Jacobs · 14 years ago
  15. 76890dd Change Geode GX2 to use the auto DRAM detect code from Geode LX. by Nils Jacobs · 14 years ago
  16. 9644623 Remove some unused code. by Nils Jacobs · 14 years ago
  17. 809e29e GX2: Clean up some white space and comments. by Nils Jacobs · 14 years ago
  18. fc9fcf7 GX2: Change MSR register numbers into more descriptive names. by Nils Jacobs · 14 years ago
  19. b69cb5a Convert some comments to proper Doxygen syntax. by Uwe Hermann · 14 years ago
  20. 9fe5069 Correct spelling of "spacing" (in comments). by Jonathan Kollasch · 14 years ago
  21. 1ba2eee Revision 5966 changed the end of line style of the 3 modified files. This change restores the original end of line style. by Scott Duplichan · 14 years ago
  22. af786b6 When debug logging is enabled, a message such as '* AP 02 timed out:02010501' by Scott Duplichan · 14 years ago
  23. 212d0a2 Remove various .c #includes from Intel i810/i82801ax/i82801bx boards. by Uwe Hermann · 14 years ago
  24. ab50d62 Convert all Intel i810 boards to CAR. by Uwe Hermann · 14 years ago
  25. 8912285 Trivial. Clean up code and add some comments. by Zheng Bao · 14 years ago
  26. f1aa984 Move translate_spd_to_i82810[] from .h to .c file (trivial). by Uwe Hermann · 14 years ago
  27. 74d1a6e We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it. by Uwe Hermann · 14 years ago
  28. 4b42a62 Factor out a few commonly duplicated functions from northbridge.c. by Uwe Hermann · 14 years ago
  29. 115c5b9 Remove various .c #includes from Intel 440BX/82371EB boards. by Uwe Hermann · 14 years ago
  30. 53b52f3 Trivial. Spell checking. by Zheng Bao · 14 years ago
  31. 1dcf6689 Trivial. Spell checking. by Zheng Bao · 14 years ago
  32. c3af12f Trivial. Spell checking. by Zheng Bao · 14 years ago
  33. 3d682fe Trivial. Fix the typo. by Zheng Bao · 14 years ago
  34. e5b7507 Remove duplicate line from pci_ids.h. by Jonathan Kollasch · 14 years ago
  35. 6f2d20e Convert all Intel 440BX boards to Cache-as-RAM (CAR). by Uwe Hermann · 14 years ago
  36. b7a7b79 Use %p instead of %x to print void *. by Jonathan Kollasch · 14 years ago
  37. d083595 Remove lib/ramtest.c-include from all CAR boards. by Patrick Georgi · 14 years ago
  38. ebe6d58 Fix spelling/typos in comments. by Jonathan Kollasch · 14 years ago
  39. e82618d Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig, by Patrick Georgi · 14 years ago
  40. 76d9143 Make i945/raminit.c:fsbclk() return u16 rather than int by Peter Stuge · 14 years ago
  41. e4bc0f6 Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM by Peter Stuge · 14 years ago
  42. 77d6683 Move several i945 config #defines from romstage.c to Kconfig. by Patrick Georgi · 14 years ago
  43. 52000e1 Trivial. Re-indent the code. by Zheng Bao · 14 years ago
  44. 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 14 years ago
  45. 7b1a3c3 Trivial. re-Indent the code. by Zheng Bao · 14 years ago
  46. 7cdf1ec Obviously missing brackets. by Xavi Drudis Ferran · 14 years ago
  47. 86224f6 Mark read-only data as read-only, so the global vars test doesn't fail on it. by Patrick Georgi · 14 years ago
  48. f14c919 Various CONFIG_DEBUG_RAM_SETUP related fixes (trivial). by Uwe Hermann · 14 years ago
  49. 7fd931b Keep the mc146818rtc.h include close to the option table include where by Myles Watson · 14 years ago
  50. 10ec0fe - Fix race condition in option_table.h generation by moving the include by Stefan Reinauer · 14 years ago
  51. 0c51ddd Complete the code which was missing. by Zheng Bao · 14 years ago
  52. 951a0fe Fix the typo. Field DisAutoRefresh is in DramTimngHi. by Zheng Bao · 14 years ago
  53. df35cdc A number of cleanups for 440BX raminit code. by Keith Hui · 14 years ago
  54. 6c029e6 Add reserved areas for fam10. by Myles Watson · 14 years ago
  55. 687b3ba Port k8 UMA handling to fam10. by Myles Watson · 14 years ago
  56. cb817be Fix a typo reported by Sylvain Hitier. by Myles Watson · 14 years ago
  57. 25d1213 Convert i945 boards to use reserved resources instead of directly adding by Myles Watson · 14 years ago
  58. 6ea2115 Move memory type information out of some AMD sockets. by Myles Watson · 14 years ago
  59. d6689ed Please find appended. This patch gets rid of the %gs magic altogether, by Arne Georg Gleditsch · 14 years ago
  60. e150e9a Also improve boot time on AMD for the DDR3 code path. Fix a typo, too. by Arne Georg Gleditsch · 14 years ago
  61. 6556534 Apparently, it's not crucial to clear this at the exact moment we switch by Arne Georg Gleditsch · 14 years ago
  62. f7a999a Trivial. Currently the max frequency is preset as 400Mhz. We need to set a by Zheng Bao · 14 years ago
  63. 08c92e0 AMD DDR2 and DDR3 MCT function InitPhyCompensation() compliant with AGESA code. by Kerry She · 14 years ago
  64. dfe8d76 Trivial warning fix for adl855pc. by Myles Watson · 14 years ago
  65. 9fae99f Get Byte65/66 for register manufacture ID code. RegMan1Present will by Zheng Bao · 14 years ago
  66. 704b596 We call this cache as ram everywhere, so let's call it the same in Kconfig by Stefan Reinauer · 14 years ago
  67. 459b0d2 This file was missing from r5751. by Andreas Schultz · 14 years ago
  68. b6b29db Rework i855GM/i855GME support by Andreas Schultz · 14 years ago
  69. 819ee74 Multi-DIMMS on AMD ddr2 MCT channel B fixed. by Kerry She · 14 years ago
  70. 99cfa1e Multi-DIMMS on AMD ddr3 MCT channel B works. by Kerry She · 14 years ago
  71. 108d30b Trivial syntax correction of AMD mct_ddr3 dir. by Kerry She · 14 years ago
  72. b3f8090 drop three unneeded config variables: by Jens Rottmann · 14 years ago
  73. 0d11f2d CONFIG_DEBUG_RAM_SETUP and CONFIG_DEBUG_SMBUS are only available if the board / by Jens Rottmann · 14 years ago
  74. d058ad1 One of my boards needs this mini delay in order to survive ram initialization. by Stefan Reinauer · 14 years ago
  75. bc8613e Fix i945 based boards by Stefan Reinauer · 14 years ago
  76. 6f22ecc * Adds support for PC Engines Alix.2D(1)3 board to Coreboot. by Aurelien Guillaume · 14 years ago
  77. 4793ef1 documented workaround erratum 414, see by Xavi Drudis Ferran · 14 years ago
  78. 213ab94 documented workaround erratum 372, see by Xavi Drudis Ferran · 14 years ago
  79. cc6244a Include RB_C3 in erratum 346 by Xavi Drudis Ferran · 14 years ago
  80. 752f1b4 Add RB_C3 to AMD_FAM10_ALL so that it gets its MSR right for mtrs, ht, etc. by Xavi Drudis Ferran · 14 years ago
  81. e660f04 Fix warnings (that become errors) in AMDHT for certain configurations (unused functions) by Xavi Drudis Ferran · 14 years ago
  82. 23ffe8b The number of cores is got by reading the bit 15,13,12 of [0,24,3,e8]. by Zheng Bao · 14 years ago
  83. 8c4f31b Drop the USE_PRINTK_IN_CAR option. It's a bogus decision to make for any user / by Stefan Reinauer · 14 years ago
  84. 0362c6d VGA code needs to be refactored before it can be compiled conditionally. by Myles Watson · 14 years ago
  85. 2d7ff69 Build VGA code conditionally to avoid errors when using SeaBIOS. by Myles Watson · 14 years ago
  86. f976548 Clarify a comment on an old hack, remove the call to early_mtrr_init by Corey Osgood · 14 years ago
  87. 43110f5 Update my old, no longer active email addresses by Corey Osgood · 14 years ago
  88. e474070 This patch converts the Geode GX2 boards to CAR. by Nils Jacobs · 14 years ago
  89. e3fb1c2 Make include paths more consistent. Fixes compilation errors for me. by Myles Watson · 14 years ago
  90. 2f969a6 Trivial -Werror fix. by Cristi M · 14 years ago
  91. 6f57b51 Fix all warnings in the tree by Stefan Reinauer · 14 years ago
  92. 817d754 get rid of even more fam10 and k8 warnings. by Stefan Reinauer · 14 years ago
  93. 5e33e82 fix some more warnings by Stefan Reinauer · 14 years ago
  94. 42da0e6 fix some warnings. by Stefan Reinauer · 14 years ago
  95. e32d399 Kill a few more warnings. by Myles Watson · 14 years ago
  96. 7bcaa92 Eliminate a couple of warnings from setup_resourcemap.c by Myles Watson · 14 years ago
  97. eb50c7d Re-integrate "USE_OPTION_TABLE" code. by Edwin Beasant · 14 years ago
  98. 8376831 A bug fix: Fix the ctrl_devport_conf_clear to clear the enable bit. by Myles Watson · 14 years ago
  99. 992ae48 This patch implements GFXUMA on all supported i810 boards. Also some fix-ups to the i810 northbridge.c code. by Joseph Smith · 14 years ago
  100. 7eac445 Always enable parent resources before child resources. by Myles Watson · 14 years ago