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review.coreboot.org / coreboot / d7210c579e20a2844da3a96747e8f4cc3695b042 / src
  1. d7210c5 mainboard/asus/kfsn4-dre: Change default debug level to Spew by Timothy Pearson · 9 years ago
  2. b812d5d northbridge/amd/amdht/h3finit.c: Fix boot failure by Timothy Pearson · 9 years ago
  3. 8517f94 OxPCIe952: Fix read8/write8 argument by Kyösti Mälkki · 9 years ago
  4. f9fb0d9 Use a common boardid.h instead of per board copies by Vadim Bendebury · 10 years ago
  5. 586d6e2 northbridge/amd/amdht: Allow mainboards to set HT frequency limit by Timothy Pearson · 9 years ago
  6. 668828d siemens/mc_tcu3: Fix build and ACPI IRQ bridge entry by Kyösti Mälkki · 9 years ago
  7. c5cd57c nyan: Remove broken setup_display() from romstage by Julius Werner · 10 years ago
  8. b7b8371 northbridge/intel/nehalem: don't set FERR_CAPABILITY on BSP by Alexander Couzens · 9 years ago
  9. ed48dfd cpu/intel/2065x: add define for MSR IA32_FERR_CAPABILITY by Alexander Couzens · 9 years ago
  10. 144a68a coreboot t132: Remove empty function cpu0_config_and_reset by Furquan Shaikh · 10 years ago
  11. d123f86 coreboot t132: Stop running AVP at the end of romstage by Furquan Shaikh · 10 years ago
  12. 9ad04c6 coreboot arm64: Add int constants to stdint.h by Furquan Shaikh · 10 years ago
  13. 44f465d tegra132: fix Rx FIFO underruns with slower SPI clock by Aaron Durbin · 10 years ago
  14. 7ddb5f7 tegra132: Add Trust Zone register access by Aaron Durbin · 10 years ago
  15. da9b9f3 t132: Add mmu support by Furquan Shaikh · 10 years ago
  16. 2486957 armv8: Add mmu support by Furquan Shaikh · 10 years ago
  17. a6ca935 ryu: Add TPS65913 regs/init for VDD_CPU 1.0V by Tom Warren · 10 years ago
  18. 2525885 tegra132: Add code to setup chip operations and mem resources. by Tom Warren · 10 years ago
  19. 31818c9 ryu: Add support for full LPDDR3 SDRAM BCT init via BootROM by Tom Warren · 10 years ago
  20. 01dde90 armv8: correct dcache line size calculation by Aaron Durbin · 10 years ago
  21. b397f01 tegra132: split memory range querying to above/below 4GiB by Aaron Durbin · 10 years ago
  22. c20ff48 storm: allow to override CBFS_SIZE configuration setting by Vadim Bendebury · 10 years ago
  23. bc3019c t132: handle optional Trust Zone region correctly by Aaron Durbin · 10 years ago
  24. d08057a intel/fsp_baytrail: Add PCI Root Port IRQ Routing by Martin Roth · 9 years ago
  25. 48b3dbc x86 SMM: Replace weak prototypes with weak function stub by Kyösti Mälkki · 10 years ago
  26. b0922f0 lenovo: fix smi gpe + wakeup pin for t420s t520 t530 x220 x230 by Nicolas Reinecke · 10 years ago
  27. 60ef456 console/Kconfig: Enable CBMEM console by default by Paul Menzel · 10 years ago
  28. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  29. a637194 x86 cache-as-ram: Remove BROKEN_CAR_MIGRATE option by Kyösti Mälkki · 9 years ago
  30. f48b38b ARM romstages: Support and fix COLLECT_TIMESTAMPS by Kyösti Mälkki · 10 years ago
  31. 01fe638 cbmem console: Allow the cbmem console on non-x86 systems again. by Gabe Black · 10 years ago
  32. 180a114 northbridge/amd/pi: Remove superfluous logic operand by Dave Frodin · 10 years ago
  33. 006364e AMD Bald Eagle: Add northbridge files for new AMD processor by Bruce Griffith · 10 years ago
  34. 1a7da5c x86: simplify early_variables.h header by Aaron Durbin · 9 years ago
  35. db9d169 qemu: 2.1+ smbios tables support by Gerd Hoffmann · 10 years ago
  36. dbe0df1 Add and consistently use wrapper macro for romstage static variables by Julius Werner · 10 years ago
  37. 408ebe6 console: Fix broken early_print.h include guards by Stefan Reinauer · 9 years ago
  38. bf62b2d AMD fam10: Drop PCI_BUS_SEGN_BITS by Kyösti Mälkki · 9 years ago
  39. 991a71d AMD fam10: Fix include of conf.c by Kyösti Mälkki · 9 years ago
  40. 510d1bd build.h: remove variable for the builduser, -hostname and -domain by Alexander Couzens · 9 years ago
  41. bd29530 AMD fam10: Remove __PRE_RAM__ from ramstage-only code by Kyösti Mälkki · 9 years ago
  42. 5ef269b AMD fam10: Always have AMDMCT by Kyösti Mälkki · 9 years ago
  43. c0ee937 AMD K8: Fix allocation size for HyperTransport links by Kyösti Mälkki · 9 years ago
  44. 11c79d7 AMD K8: Move the test for connected HyperTransport link by Kyösti Mälkki · 10 years ago
  45. e0b6fbd google/samus/acpi/mainboard.asl: Correctly align comment by Paul Menzel · 10 years ago
  46. bdaeea5 cpu/Kconfig: Make in-tree microcode generation dependent on BLOBs repository by Paul Menzel · 9 years ago
  47. 9604474 broadwell: enable PCIe endpoint CLK power management by Kane Chen · 10 years ago
  48. 18cb134 device/pciexp: Add support for PCIe CLK power management by Kane Chen · 10 years ago
  49. 2c4aab3 coreboot: fix munged license text by Aaron Durbin · 9 years ago
  50. f69a27b device: drop i915 specific headers from resource allocator includes by Stefan Reinauer · 10 years ago
  51. b6fa61a northbridge/amd/amdmct: Fix burst write depth on K10 rev. D and later by Timothy Pearson · 9 years ago
  52. 9824735 AGESA: Move agesawrappers related to HAVE_ACPI_RESUME support by Kyösti Mälkki · 10 years ago
  53. 82fbda7 AGESA: Use same HeapManager for all BiosCallOuts by Kyösti Mälkki · 10 years ago
  54. 0127c6c AMD: Uniformly define MSRs for TOP_MEM and TOP_MEM2 by Kyösti Mälkki · 9 years ago
  55. c13fc15 t132: add Kconfig option for MTS microcode directory by Aaron Durbin · 10 years ago
  56. df324f5 tegra132: add preboot MTS to bct generation by Aaron Durbin · 10 years ago
  57. a425b96 AMD Fam10h: Only create _PR scope if it is filled in by Patrick Georgi · 9 years ago
  58. aab66b1 AMD Fam10h: sanity check some CPU data by Patrick Georgi · 9 years ago
  59. f752d01 storm: Provide ability to build ap148 variant by Vadim Bendebury · 10 years ago
  60. 30cda7e arm64: provide early SoC initialization by Aaron Durbin · 10 years ago
  61. 072e0cc rush_ryu: Add new mainboard by Aaron Durbin · 10 years ago
  62. 5f66b52 tegra132: add support for TZ carve-out by Aaron Durbin · 10 years ago
  63. 9c8cfc5 coreboot arm64: Add proper masks for setting SCTLR and SCR regs to 0 at init by Furquan Shaikh · 10 years ago
  64. f13c567 t132: handle carve-outs for addressable memory by Aaron Durbin · 10 years ago
  65. eeacf74 t132: Enable cbmem console support by Aaron Durbin · 10 years ago
  66. 5626d8f t132: bring up 64-bit denver core by Aaron Durbin · 10 years ago
  67. c42a613 mainboard/siemens/mc_tcu3: Add new mainboard. by Werner Zeh · 9 years ago
  68. 0f9c9de fsp_baytrail: Add I2C driver by Werner Zeh · 9 years ago
  69. b5a374d fsp_baytrail: Add new microcode for Bay Trail M by Werner Zeh · 9 years ago
  70. fb9d4ca mainboard: Do not redefine DRIVERS_PS2_KEYBOARD Kconfig variable by Alexandru Gagniuc · 9 years ago
  71. bc772c3 arm64: Set 16 byte alignment and ramstage start address by Aaron Durbin · 10 years ago
  72. 00263d0 arm64: remove assembly code string functions by Aaron Durbin · 10 years ago
  73. 0df877a arm64: use one stage_entry for all stages by Aaron Durbin · 10 years ago
  74. 6ba1b62 arm64: ensure vital sections aren't garbage collected by Aaron Durbin · 10 years ago
  75. e5d014c coreboot t132: Stack init re-work by Furquan Shaikh · 10 years ago
  76. dfe7ea2 rush: PMIC: initial AS3722 PMIC writes for Rush by Tom Warren · 10 years ago
  77. d2907c1 t132: kick off core complex after loading MTS microcode by Aaron Durbin · 10 years ago
  78. 196ee2b coreboot memrange: Two changes for zero size or empty memrange by Furquan Shaikh · 10 years ago
  79. 3aca2cd t132: load MTS microcode by Aaron Durbin · 10 years ago
  80. 73307e0 Add stage information to coreboot banner by Stefan Reinauer · 9 years ago
  81. 8ddc1f3 rush: enable 128MiB MTS carveout below top of DRAM by Aaron Durbin · 10 years ago
  82. 0e69639 t132: Replace fallback with CONFIG_CBFS_PREFIX by Marc Jones · 9 years ago
  83. 1ac4e59 t132: Add shared romstage by Aaron Durbin · 10 years ago
  84. 650d11c coreboot rush: Add dram init code by Furquan Shaikh · 10 years ago
  85. d42b3fc coreboot rush: Add support for basic romstage by Furquan Shaikh · 10 years ago
  86. b68cb9e coreboot t132: Enable loading of romstage from CBFS media by Furquan Shaikh · 10 years ago
  87. f0d150e coreboot t132: Remove init pllx for now by Furquan Shaikh · 10 years ago
  88. 84bbab9 coreboot t132,rush: Add mainboard specific bootblock_init by Furquan Shaikh · 10 years ago
  89. a89accd cpu/amd/model_10xxx: Documentation update by Timothy Pearson · 9 years ago
  90. ead8751 cpu/amd/model_10xxx: Refactor model detection to reduce code duplication by Timothy Pearson · 9 years ago
  91. 29c1afc coreboot t132: Add clock.c to all three stages of coreboot by Furquan Shaikh · 10 years ago
  92. 226fc94 northbridge/amd/amdmct: Add revision D to K10 revision mask list by Timothy Pearson · 9 years ago
  93. 67b0374 coreboot arm64: Correct cache function names by Furquan Shaikh · 10 years ago
  94. d653ae8 coreboot arm: Define function for setting cntfrq register by Furquan Shaikh · 10 years ago
  95. 732b83e tegra132: Enable bootblock support in tegra132 including UART support by Furquan Shaikh · 10 years ago
  96. 280a29d devicetree: Drop redundant scan_bus() ops by Kyösti Mälkki · 9 years ago
  97. 85756c1 devicetree: Drop dummy root_dev ops by Kyösti Mälkki · 9 years ago
  98. 976d91c AGESA fam16: Drop HyperTransport scan by Kyösti Mälkki · 9 years ago
  99. 5818da2 cpu/intel: (non-FSP) Remove microcode updates from tree by Alexandru Gagniuc · 11 years ago
  100. ee89435 cpu/intel (non-FSP): Use microcode from blobs repository by Alexandru Gagniuc · 11 years ago