1. d2990ff soc/intel: unify VBT fetching API by Patrick Georgi · 6 years ago
  2. 6403167 compiler.h: add __weak macro by Aaron Durbin · 6 years ago
  3. c37b0e3 soc/intel/skylake: Generate ACPI DMAR table by Nico Huber · 7 years ago
  4. 2afe4dc soc/intel/skylake: Enable VT-d and X2APIC by Nico Huber · 7 years ago
  5. f511695 soc/intel/skylake: Limit xDCI feature when VBOOT is enabled by Duncan Laurie · 6 years ago
  6. 74ea48e soc/intel/skylake: Add devicetree variable for PCIe HotPlug by Duncan Laurie · 7 years ago
  7. da6f4ae soc/intel/skylake: Set PsysPmax value by Gaggery Tsai · 7 years ago
  8. 14e0fa5 soc/intel/skylake: Add device setting for sata power optimization by Kane Chen · 7 years ago
  9. e7fb7ce soc/intel/skylake: Add PcieRpClkSrcNumber UPD configuartion support by Divya Chellap · 7 years ago
  10. 14485ef soc/intel/skylake: Add integrated LAN config parameters by Duncan Laurie · 7 years ago
  11. ec5a947 soc/intel/skylake: make tcc_offset take effect by marxwang · 7 years ago
  12. 5c619a2 soc/intel/skylake: Remove set_subsystem() from SoC by Subrata Banik · 7 years ago
  13. 3c838c7 soc/intel/skylake: Remove pch_enable_dev() from SoC by Subrata Banik · 7 years ago
  14. 9e0d69b soc/intel/skylake: pass SataSpeedLimit param to FSP2 by Matt DeVillier · 7 years ago
  15. c6a0050 soc/intel/skylake: use locate_vbt directly instead of calling a wrapper by Patrick Georgi · 7 years ago
  16. b3e18c7 soc/intel/skylake: Add config for mbx command for Intersil VR C-state issues by Rizwan Qureshi · 7 years ago
  17. 0393739 soc/intel/skylake: Add config for enabling LTR for PCIe Root port by Rizwan Qureshi · 7 years ago
  18. 6ab4ed4 soc/intel/skylake: Add config for enabling PCIe AER by Rizwan Qureshi · 7 years ago
  19. c204aaa soc/intel/skylake: Add LPC and SPI lock down config option by Subrata Banik · 7 years ago
  20. fbf1018 soc/intel/skylake: Lock sideband access in coreboot and not in FSP by Barnali Sarkar · 7 years ago
  21. 4859ce0 soc/intel/skylake: Skip Spi Flash Lockdown from FSP by Barnali Sarkar · 7 years ago
  22. 6b45ee4 soc/intel/skylake: Add option to enable/disable EIST by Subrata Banik · 7 years ago
  23. ffe5810 soc/intel/skylake: Add option to disable host reads to PMC XRAM by Rizwan Qureshi · 8 years ago
  24. f4c4ab9 soc/intel/skylake: Fix remaining issues detected by checkpatch by Lee Leahy · 7 years ago
  25. b2aac85 intel/skylake: Add devicetree settings for acoustic noise mitigation by Duncan Laurie · 7 years ago
  26. 0da186c soc/intel/skylake: indicate voltage margining enabled/disabled by Rizwan Qureshi · 7 years ago
  27. c2c8a74 soc/intel/skylake: Enable Systemagent IMGU by Rizwan Qureshi · 8 years ago
  28. c248044 soc/intel/skylake: Fix broken suspend-resume by Furquan Shaikh · 7 years ago
  29. 25c7d93 soc/intel/skylake: Disable s0ix if not enabled in devicetree by Duncan Laurie · 7 years ago
  30. a4b11e5c soc/intel/skylake: Perform CPU MP Init before FSP-S Init by Subrata Banik · 8 years ago
  31. 7a0044b Revert: soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1 by Duncan Laurie · 8 years ago
  32. 32997fb soc/intel/skylake: Set FSP-S UPD PchHdaIDispCodecDisconnect to 1 by Barnali Sarkar · 8 years ago
  33. 7d48410 skylake: Do not pass VBT to FSP if display init not required by Duncan Laurie · 8 years ago
  34. 6c191d8 romstage_handoff: add helper to determine resume status by Aaron Durbin · 8 years ago
  35. 6467014 soc/intel/skylake: Use SendVrMbxCmd1 for FSP 2.0 by Rizwan Qureshi · 8 years ago
  36. eedf6d8 soc/intel/skylake: Disable Legacy PME for Root ports by Naresh G Solanki · 8 years ago
  37. 2c3054c soc/intel/skylake: Add USB Port Over Current (OC) Pin programming by Subrata Banik · 8 years ago
  38. c6ec8dd fsp2_0: implement stage cache for silicon init by Brandon Breitenstein · 8 years ago
  39. ed14a4e soc/intel/skylake: move i2c voltage config to own variable by Aaron Durbin · 8 years ago
  40. a2d4062 soc/intel/skylake: Add FSP 2.0 support in ramstage by Naresh G Solanki · 8 years ago
  41. 1222a73 skylake: Add initial FSP2.0 support by Rizwan Qureshi · 8 years ago[Copied (61%) from src/soc/intel/skylake/include/soc/ramstage.h]
  42. 2f6fb9f skylake: Add ACPI device name handler by Duncan Laurie · 8 years ago
  43. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  44. 94b856e FSP 1.1: Move common FSP code by Lee Leahy · 9 years ago
  45. 1d14b3e soc/intel: Add Skylake SOC support by Lee Leahy · 9 years ago
  46. b000513 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC by Lee Leahy · 9 years ago