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review.coreboot.org / coreboot / d19ebe0bd5c05badc7b800eab625559a8ac7d2f0 / src / soc / intel / cannonlake / acpi / southbridge.asl
  1. d19ebe0 soc/intel: Rename pcr.asl to pch_pcr.asl by Subrata Banik · 1 year, 1 month ago
  2. 6d44437 soc/intel/cannonlake: Switch to runtime generation of Intel Power Engine by Tim Wawrzynczak · 3 years, 2 months ago
  3. f9bb1b4 soc/intel/cannonlake: Use new IRQ module by Tim Wawrzynczak · 3 years, 2 months ago
  4. 09f0605 soc/intel: Include gfx.asl from northbridge by Angel Pons · 3 years, 8 months ago
  5. 5cf4c87 soc/intel/common: Move gfx.asl to drivers/intel/gma by Matt DeVillier · 3 years, 8 months ago
  6. 05c732b soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPD by Michael Niewöhner · 3 years, 10 months ago
  7. ad87b2a soc/intel/common/block/acpi: Factor out common gfx.asl by Subrata Banik · 3 years, 11 months ago
  8. 37a42da soc/intel/common/block/acpi: Factor out common ish.asl by Subrata Banik · 3 years, 11 months ago
  9. 3b3bbd4 soc/intel/common/block/acpi: Factor out common smbus.asl by Subrata Banik · 3 years, 11 months ago
  10. d2becae soc/intel/common/block/acpi: Factor out common pch_glan.asl by Subrata Banik · 3 years, 11 months ago
  11. 8ca0b21 soc/intel/cnl: Add ACPI support for PMC core OS driver by Michael Niewöhner · 4 years ago
  12. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  13. ac95903 treewide: replace GPLv2 long form headers with SPDX header by Patrick Georgi · 4 years, 4 months ago
  14. 02363b5 treewide: Move "is part of the coreboot project" line in its own comment by Patrick Georgi · 4 years, 4 months ago
  15. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  16. 6f8f34f soc/intel/cannonlake: Add gfx.asl file by Mathew King · 4 years, 10 months ago
  17. 1e8f305 soc/intel/{apl,cnl,dnv,icl,skl}: Move lpc.asl into common/block/acpi by Subrata Banik · 4 years, 10 months ago
  18. 8a77454 soc/intel/cannonlake: Remove unused header files from southbridge.asl by Aamir Bohra · 5 years ago
  19. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  20. 088d2a3 soc/intel/cnl/acpi: add ish ACPI device by Jett Rink · 5 years ago
  21. 75bdd43 soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices by Subrata Banik · 6 years ago
  22. 69b18f0 mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation by Subrata Banik · 6 years ago
  23. 521e48c soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions by praveen hodagatta pranesh · 6 years ago
  24. c8a842b soc/intel/cannonlake: Add PCIE ASL entry by Subrata Banik · 6 years ago
  25. a072989 soc/intel/cannonlake: Make correct IRQ mapping for CNL SA and PCH PCI devices by Subrata Banik · 6 years ago
  26. 1d90093 soc/intel/cannonlake: Add ACPI entry for LAN by Lijian Zhao · 6 years ago
  27. d145c95 soc/intel/cannonlake: Fix comment errors for SMBUS by Lijian Zhao · 6 years ago
  28. 51605e2 soc/intel/cannonlake: Clear EMMC timeout register by Lijian Zhao · 6 years ago
  29. 20123a8 soc/intel/cannonlake: Use common PCR ASL by Lijian Zhao · 7 years ago
  30. 1b75994b src/soc/intel/cannonlake: Add _PRW for CNVi by Bora Guvendik · 7 years ago
  31. ae56546 soc/intel/cannonlake: Add all the SOC level DSDT tables by Lijian Zhao · 7 years ago
  32. 5d11cc9 soc/intel/cannonlake: add initial ASL methods for SCS, GPIO by Bora Guvendik · 7 years ago
  33. 67fb347 soc/intel/cannonlake: Add PCIE IRQs by Bora Guvendik · 7 years ago