Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
c70eed1e6202c928803f3e7f79161cd247a62b23
/
src
/
soc
/
intel
/
braswell
/
chip.c
c70eed1
device: Use pcidev_on_root()
by Kyösti Mälkki
· 6 years ago
a342f39
src: Remove unneeded whitespace
by Elyes HAOUAS
· 6 years ago
d44221f
Move compiler.h to commonlib
by Nico Huber
· 6 years ago
b13fac3
soc/intel/braswell: Get rid of device_t
by Elyes HAOUAS
· 6 years ago
3de3031
{mb,nb,soc}: Remove references to pci_bus_default_ops()
by Nico Huber
· 6 years ago
6403167
compiler.h: add __weak macro
by Aaron Durbin
· 6 years ago
348a6d5
soc/intel/braswell: add USB2 PHY PERPORTRXISET UPD
by Kevin Chiu
· 8 years ago
2c8ac22
soc/intel/braswell: Add USB2 phy setting override
by Matt DeVillier
· 7 years ago
143a836
soc/intel/braswell: Add SoC stepping identify helper
by Matt DeVillier
· 7 years ago
0c68530
soc/intel/braswell: Add I2C clock config options
by Divagar Mohandass
· 9 years ago
1072e7d
soc/intel/braswell: Add int to unsigned
by Lee Leahy
· 7 years ago
d077b58
soc/braswell: Fix issues found during static code analysis
by Ravi Sarawadi
· 9 years ago
89a6685
soc/braswell: Disable SD card detect simulation in FSP
by Divya Sasidharan
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
66208bd
FSP 1.1: Replace soc_ prefix with fsp_
by Lee Leahy
· 9 years ago
13cd331
Braswell: Modify CB to accomodate new FSPv83
by Subrata Banik
· 9 years ago
789f2b6
fsp1_1: provide binding to UEFI version
by Aaron Durbin
· 9 years ago
3247172
Braswell: Add Braswell SOC support
by Lee Leahy
· 9 years ago
25509ee
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
77ff0b1
Braswell: Use Baytrail as Comparison Base
by Lee Leahy
· 9 years ago