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review.coreboot.org / coreboot / b50602007656962ab6717d63d2f9d83e5c00dacf / src / soc / rockchip / rk3288 / sdram.c
  1. fff2021 Use the fallthrough statement in switch loops by Arthur Heymans · 3 years, 5 months ago
  2. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  3. bbc99cf soc/rockchip: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  4. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  5. 55009af Change all clrsetbits_leXX() to clrsetbitsXX() by Julius Werner · 4 years, 9 months ago
  6. 4c33a3a src: Make implicit fall throughs explicit by Jacob Garber · 5 years ago
  7. c14eb3b soc/rockchip/rk3288: Add fall through comment by Jacob Garber · 5 years ago
  8. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  9. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  10. 251514d src: Don't use a #defines like Kconfig symbols by Elyes HAOUAS · 6 years ago
  11. 6df3b64 src: Remove duplicated round up function by Elyes HAOUAS · 6 years ago
  12. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  13. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  14. ed84a8f rockchip/rk3288: Fix operator precedence error in LPDDR init by Julius Werner · 9 years ago
  15. 9418476 arm(64): Manually clean up the mess left by write32() transition by Julius Werner · 9 years ago
  16. 2f37bd6 arm(64): Globally replace writel(v, a) with write32(a, v) by Julius Werner · 9 years ago
  17. 5c8aacf rockchip: configure lpddr odt properly by Derek Basehore · 9 years ago
  18. 8cc3a2a rk3288: support single channel ddr by jinkun.hong · 10 years ago
  19. ee28c86 rk3288: detect sdram size at runtime by huang lin · 10 years ago
  20. 129b5fa rk3288: Fix failing LPDDR3 reboot test by jinkun.hong · 10 years ago
  21. d4a227b rk3288: Fix failing DDR3 reboot test by jinkun.hong · 10 years ago
  22. 8188ab7 rk3288: Increase the delay after DDR reset de-assert to 10us. by Dailunxue · 10 years ago
  23. 7a453eb rk3288: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  24. b6092b7 veyron_pinky/rk3288: Use KHz, MHz and GHz constants by Julius Werner · 10 years ago
  25. 3e9ea16 coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhz by jinkun.hong · 10 years ago
  26. 82ba4d0 rk3288: add cpu and chip by huang lin · 10 years ago
  27. c33ce35 rk3288: add ddr driver by Jinkun Hong · 10 years ago