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review.coreboot.org / coreboot / b3a8cc54dbaf833c590a56f912209a5632b71f49 / src / soc / cavium / cn81xx / soc.c
  1. 71c0a94 drivers/cavium: Add UART PCI driver by Patrick Rudolph · 6 years ago
  2. dff29e0 bootmem: add new memory type for BL31 by Ting Shen · 6 years ago
  3. ead574e src: Get rid of duplicated includes by Elyes HAOUAS · 6 years ago
  4. d2b9ec1 src: Remove unneeded include "{arch,cpu}/cpu.h" by Elyes HAOUAS · 6 years ago
  5. fe66a07 soc/cavium: dynamic UART initialization for cavium cn8100 by Jens Drenhaus · 6 years ago
  6. 27667a2 soc/cavium/cn81xx: Don't use device_t in ramstage by Elyes HAOUAS · 6 years ago
  7. 70866e9 soc/cavium/cn81xx: Don't directly manipulate devicetree data by Patrick Rudolph · 6 years ago
  8. 0a7d690 device_tree/fit: Constify data structures by Patrick Rudolph · 6 years ago
  9. 52acef1 soc/cavium/cn81xx: Fix minor things by Patrick Rudolph · 6 years ago
  10. eead879 [HACK]cavium/cn81xx/soc: Don't advertise CAR area as usable by Patrick Rudolph · 6 years ago
  11. 5cdaa33 soc/cavium/cn81xx: Use ATF from blobs repo by Patrick Rudolph · 6 years ago
  12. de4410c soc/cavium: Apply additional devicetree fixups by Patrick Rudolph · 6 years ago
  13. d0c6797 soc/cavium: Add PCI support by Patrick Rudolph · 6 years ago
  14. 88f81af soc/cavium: Add secondary CPU support by Patrick Rudolph · 6 years ago
  15. 8cbd569 cavium: Add CN81xx SoC and eval board support by David Hendricks · 7 years ago