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review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / src
  1. fb38eb0 WARNINGS_ARE_ERRORS is y per default, don't set it twice. by Stefan Reinauer · 13 years ago
  2. d1760c8 Port persimmon r6594 to e350m1: Cosmetic cleanup by Peter Stuge · 13 years ago
  3. f8e33e3 Port persimmon r6593 to e350m1: Remove unused Kconfig options by Peter Stuge · 13 years ago
  4. 2334c8d Port persimmon r6592 to e350m1: Update GPP port configuration by Peter Stuge · 13 years ago
  5. 314f4a2 Port persimmon r6591 to e350m1: ROM cache early by Marshall Buschman · 13 years ago
  6. 1a7699f Port persimmon r6590 to e350m1: Work around memory allocation problem by Marshall Buschman · 13 years ago
  7. bb2ca2b Port persimmon r6589 to e350m1: Strip down AGESA options by Marshall Buschman · 13 years ago
  8. af85315 Port persimmon r6588 to e350m1: VGA framebuffer by Marshall Buschman · 13 years ago
  9. adc89b0 Port persimmon r6587 to e350m1: RTC is not PIIX4 compatible by Marshall Buschman · 13 years ago
  10. ac4bef4 Port persimmon r6586 to e350m1: FADT revision by Marshall Buschman · 13 years ago
  11. 552ad9f Port persimmon r6584 and r6601 to e350m1: SPI prefetch early by Marshall Buschman · 13 years ago
  12. fd460e6 Port persimmon r6583 to e350m1: pstate 0 early by Marshall Buschman · 13 years ago
  13. b3ee0d6 Port persimmon r6582 to e350m1: 33 MHz SPI read early by Marshall Buschman · 13 years ago
  14. 69e1bfc Port persimmon r6578 and r6596 to e350m1: MMCONF base by Peter Stuge · 13 years ago
  15. eb92b5a Port persimmon r6574 to e350m1: MMCONF size by Marshall Buschman · 13 years ago
  16. 5a40319 Port persimmon r6573 to e350m1: VGA, PCI MMIO and SB800 legacy by Marshall Buschman · 13 years ago
  17. 6d5ee2d Port persimmon r6572 to e350m1: I/O APIC ID by Marshall Buschman · 13 years ago
  18. e1898b5 vt8237r: Simplify bootblock init to work around nested if() romcc problem by Peter Stuge · 13 years ago
  19. 471f103 This patch sets max freq defaults for ddr2 and ddr3for fam10. by Marc Jones · 13 years ago
  20. 23d3dfa Correct wrong PCI ID for VIA K8M890 Chrome. by Alexandru Gagniuc · 13 years ago
  21. 3bf2708 advansus/a785e-i mainboard enable warning as error by Kerry She · 13 years ago
  22. 76d53b2 trivial remove blanks at the end of line by Kerry She · 13 years ago
  23. 991f880 This patch fix a AMD sb800 wrapper compile warning: by Kerry She · 13 years ago
  24. b2ecd81 We don't have pausing versions of single-IO instructions. by Stefan Reinauer · 13 years ago
  25. 9cb1756 AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards. by Stefan Reinauer · 13 years ago
  26. 4053e14 Correct implementation of r6608. (.align actually takes its argument in bytes) by Jonathan Kollasch · 13 years ago
  27. 6409a22 Ensure ck804 romstrap is 16-byte aligned. by Jonathan Kollasch · 13 years ago
  28. fb93178 Correct amd persimmon romstage code for early SPI prefetch enable. by Scott Duplichan · 13 years ago
  29. 20aad25 Move the ACPI FACP table to the front of the RSDT list. This is done to work around a Windows XP or Server 2003 setup failure where an error message such as: "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" occurs. This change updates AMD reference board projects, but could applied to others as well. by Scott Duplichan · 13 years ago
  30. 3f0075b cimx_wrapper/sb800: Fix indent in late.c:sb800_enable() by Peter Stuge · 13 years ago
  31. 44d3c3d Remove multiple mmconf settings and just use kconfig setting. by Marc Jones · 13 years ago
  32. 16c8e37 agesa_wrapper: Avoid repetitive Kconfig depends, trivial by Peter Stuge · 13 years ago
  33. 8c46263 Cosmetic cleanup. by Scott Duplichan · 13 years ago
  34. 5d878ad 1) Remove unused kconfig options. 2) Correct UMA graphics PCI device ID. by Scott Duplichan · 13 years ago
  35. a64ab46 Update gpp port configuration. by Scott Duplichan · 13 years ago
  36. 769527e Enable rom cache early to reduce boot time. by Scott Duplichan · 13 years ago
  37. 3c639e7 Fix memory allocation problem in amdInitLate. Disabled until further debug. by Scott Duplichan · 13 years ago
  38. 0b886ae Remove some non-essential agesa options to reduce boot time. by Scott Duplichan · 13 years ago
  39. dbbbca3 Declare legacy video frame buffer so that Windows generic VGA driver will work. by Scott Duplichan · 13 years ago
  40. 0ebefd2 Declare RTC as not PIIX4 compatible to match AMD hardware. by Scott Duplichan · 13 years ago
  41. 254a6d6 Make fadt revision match its length. Solves Windows 7 checked build assert. by Scott Duplichan · 13 years ago
  42. b7e0683 Enable SPI cacheline prefetch early to reduce boot time. by Scott Duplichan · 13 years ago
  43. 2cc5f55 Enable SPI cacheline prefetch early to reduce boot time. by Scott Duplichan · 13 years ago
  44. d9a634c Switch processor cores to pstate 0 early to reduce boot time. by Scott Duplichan · 13 years ago
  45. e73fc208 Enable 33 MHz fast mode SPI read early to reduce boot time. by Scott Duplichan · 13 years ago
  46. 9ab3c6c Build device paths for AP cores so that coreboot will report them to the OS. by Scott Duplichan · 13 years ago
  47. be8fae1 Program the I/O APIC ID. by Scott Duplichan · 13 years ago
  48. f191c72 Enable AHCI mode and hide IDE controller to reduce boot time. by Scott Duplichan · 13 years ago
  49. dc312cc Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR. by Scott Duplichan · 13 years ago
  50. 2b9143a Fix ACPI shutdown function by removing reliance on SMI. by Scott Duplichan · 13 years ago
  51. e78ae24 Configure CIMx to use 33 MHz fast mode for SPD read. by Scott Duplichan · 13 years ago
  52. 444c49c Match DIMM SPD addressing to implemented slots. by Scott Duplichan · 13 years ago
  53. 6719c23 Size mmconf according to CONFIG_MMCONF_BUS_NUMBER. by Scott Duplichan · 13 years ago
  54. b0b4063 1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support. by Scott Duplichan · 13 years ago
  55. 6f7375c 1) Set I/O APIC ID according to BKDG recommendation by Scott Duplichan · 13 years ago
  56. 6d6a456 Correct the number of MCA error reporting banks cleared. by Scott Duplichan · 13 years ago
  57. a72425a 1) Initialize BSP fixed MTRRs to match AP fixed MTRR initialization. by Scott Duplichan · 13 years ago
  58. eb97e96 siemens/sitemp_g1p1: Adapt read_option() to latest changes by Josef Kellermann · 13 years ago
  59. ceccd8d Remove uart_init() in Siemens sitemp-g1p1 by Patrick Georgi · 13 years ago
  60. bfa7ee5 Add Siemens SITEMP-G1 board by Josef Kellermann · 13 years ago
  61. 8d6cf3a Work around unclean CMOS handling for now by Patrick Georgi · 13 years ago
  62. b251753 Change read_option() to a macro that wraps some API uglyness by Patrick Georgi · 13 years ago
  63. 6649d97 This replaces the fixed shift values in the apic timer init with macros. by Vikram Narayanan · 13 years ago
  64. f2ed23f Adds RS740 HT and internal graphics PCI ids. by Ivaylo Valkov · 13 years ago
  65. 6401fdb by Kerry She · 13 years ago
  66. faafd14 by Kerry She · 13 years ago
  67. eb995c2 by Kerry She · 13 years ago
  68. 1c85c77 by Kerry She · 13 years ago
  69. 8c4b499 put the amdlib and agesa constant to .rodata segment. by Kerry She · 13 years ago
  70. ccad951 Adds VOID to empty parameter lists to get rid of some build warnings. by Frank Vibrans · 13 years ago
  71. ec40260 Remove AMD Agesa requirement for standard include files by Frank Vibrans · 13 years ago
  72. 2f81c03 Enable caching for ROM area in model_6ex/cache_as_ram.inc by Sven Schnelle · 13 years ago
  73. 49ae971 i82801gx: enable SPI prefetching by Sven Schnelle · 13 years ago
  74. 8eee19d Add option 'compress ramstage' by Sven Schnelle · 13 years ago
  75. 95ebe66 Thinkpad: Enable Battery events by Sven Schnelle · 13 years ago
  76. 50270b8 X60: enable Ultrabay if device is plugged in by Sven Schnelle · 13 years ago
  77. edabf54 T60: enable Ultrabay if device is plugged in by Sven Schnelle · 13 years ago
  78. bf9e930 Lenovo PMH7: add pmh7_ultrabay_power_enable() by Sven Schnelle · 13 years ago
  79. cf7dffe Lenovo H8: add h8_ultrabay_device_present() by Sven Schnelle · 13 years ago
  80. 4885daa Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an by Stefan Reinauer · 13 years ago
  81. b721287 Fix of fix copy and paste errors in ne2k.c (r6512 by stepan) by Rudolf Marek · 13 years ago
  82. f5ce87d fix typo ttys0_index -> b_index by Stefan Reinauer · 13 years ago
  83. f349d55 Get rid of all but one (I/O mapped) UART init functions. by Stefan Reinauer · 13 years ago
  84. 6aca1e8 The UART divider should be calculated based on the base frequency by Stefan Reinauer · 13 years ago
  85. 3e4fb9d more ifdef -> if fixes. by Stefan Reinauer · 13 years ago
  86. d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
  87. 1d888a9 some ifdef --> if fixes by Stefan Reinauer · 13 years ago
  88. 305f2f5 drop dead code from sb800 bootblock by Stefan Reinauer · 13 years ago
  89. 685ee37 drop excessive newline in uart8250.c by Stefan Reinauer · 13 years ago
  90. bbd2f21 Simplify coreboot's console/console.h by Stefan Reinauer · 13 years ago
  91. 42fa7fe run uart_init() from console_init, just like the other console initialization functions. by Stefan Reinauer · 13 years ago
  92. d8129f9 Add Lenovo ThinkPad T60 by Sven Schnelle · 13 years ago
  93. ea3b585 PC87384: remove unused init function by Sven Schnelle · 13 years ago
  94. 81725b2e pci1x2x: remove latency/bridge control/cacheline size settings by Sven Schnelle · 13 years ago
  95. 5c72a87 pci1x2x: use cardbus_read_resources()/cardbus_enable_resources() by Sven Schnelle · 13 years ago
  96. 5f22f303 pci1x2x: use pci_ops set_subsystem instead of custom code by Sven Schnelle · 13 years ago
  97. 20f7f3b pci1x2x: add PCI1510 device IDs by Sven Schnelle · 13 years ago
  98. baec034 pci1x2x: use devicetree register configuration by Sven Schnelle · 13 years ago
  99. b297b49 drop dead uart init code. by Stefan Reinauer · 13 years ago
  100. 012d867 fix boards that still had some uart init remainders by Stefan Reinauer · 13 years ago