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review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / src
  1. 4c72d36 Remove extra newlines from the end of all coreboot files. by Martin Roth · 8 years ago
  2. 828e73e intel/wifi: Include conditionally in the build by Kyösti Mälkki · 8 years ago
  3. cf05183 mainboard/bap/ode_e21XX: Add board support by Fabian Kunkel · 8 years ago
  4. 171e2c9 mainboard/bap/ode_e21XX: Add copy of amd/olivehillplus by Fabian Kunkel · 8 years ago
  5. b0f8151 chromeos mainboards: remove chromeos.asl by Aaron Durbin · 8 years ago
  6. 212820c google/reef: Use GPE0_DW1_15 as wake signal for touchpad by Furquan Shaikh · 8 years ago
  7. 6e37e90 soc/intel/apollolake: Include gpe.h in chip.h by Furquan Shaikh · 8 years ago
  8. ce37e47 skylake: fix VSDIO is at 0.8V when SDCard is not inserted by Zhuo-hao.Lee · 8 years ago
  9. ec2947f soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume by Abhay Kumar · 8 years ago
  10. 3707fc2 google/gru & kevin: Update DRAM configuration by Lin Huang · 8 years ago
  11. df5ead9 rockchip/rk3399: sdram: correct controller vref setting by Lin Huang · 8 years ago
  12. 47bd2d9 drivers/intel/fsp2_0: Update the copyrights by Lee Leahy · 8 years ago
  13. ab88c7d google/reef: Write protect GPIO relative to bank offset by Susendra Selvaraj · 8 years ago
  14. df12d19 soc/intel/apollolake: Update FSP Header files for version 146_30 by Brandon Breitenstein · 8 years ago
  15. cd9e1e4 intel/apollolake: Update gnvs for dptf by Shaunak Saha · 8 years ago
  16. 5dd2b18 intel/apollolake: Add soc specific DPTF values by Shaunak Saha · 8 years ago
  17. 44887c3 intel/common: Add ASL code for DPTF by Shaunak Saha · 8 years ago
  18. 2098778 intel/common/opregion.c: only write 16 bytes to 16 byte field by Martin Roth · 8 years ago
  19. 8e63017 arch/riscv: Refactor bootblock.S by Jonathan Neuschäfer · 8 years ago
  20. 62bd9f9 arch/riscv: Only initialize virtual memory if it's available by Jonathan Neuschäfer · 8 years ago
  21. 0cc02ef arch/riscv: Remove spinlock code from atomic.h by Jonathan Neuschäfer · 8 years ago
  22. a90f41b intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init by Subrata Banik · 8 years ago
  23. 89f6d60 skylake/devicetree: Add LPC EC decode range by Subrata Banik · 8 years ago
  24. 50b9258 skylake/mainboard: Define mainboard hook in bootblock by Subrata Banik · 8 years ago
  25. e4a8537 soc/intel/skylake: Add C entry bootblock support by Subrata Banik · 8 years ago
  26. 68d5d8b soc/intel/skylake: Do cache as ram and prepare for C entry by Subrata Banik · 8 years ago
  27. 3339861 soc/intel/skylake: Use init_vbnv_cmos from vboot vbnv by Furquan Shaikh · 8 years ago
  28. 0faf401 soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnv by Furquan Shaikh · 8 years ago
  29. baf88d3 chromeos/gnvs: Clean up use of vboot handoff by Furquan Shaikh · 8 years ago
  30. 0d9cd92 chromeos: Clean up elog handling by Furquan Shaikh · 8 years ago
  31. c66a026 google/urara: Provide dummy implementations of rec/dev functions by Furquan Shaikh · 8 years ago
  32. faf07a8 qualcomm/gale: Add required files to enable elog in ramstage by Furquan Shaikh · 8 years ago
  33. a7f11b8 qualcomm/storm: Add required files to enable elog in ramstage by Furquan Shaikh · 8 years ago
  34. 01ac811 i2c/ww_ring: Add ww_ring files to ramstage by Furquan Shaikh · 8 years ago
  35. 18b02c5 google/chromeos: Use vboot bootmode functions for elog add boot reason by Furquan Shaikh · 8 years ago
  36. 0325dc6 bootmode: Get rid of CONFIG_BOOTMODE_STRAPS by Furquan Shaikh · 8 years ago
  37. 2a12e2e vboot: Separate vboot from chromeos by Furquan Shaikh · 8 years ago
  38. af8ef2a drivers/intel/fsp2_0: Update MRC cache with dead version in recovery by Furquan Shaikh · 8 years ago
  39. c319737 soc/intel/common: Store MRC data in next available slot in the cache by Furquan Shaikh · 8 years ago
  40. bc24b85 mainboard/google/slippy: remove unobtainable mainboard by Aaron Durbin · 8 years ago
  41. 139314b mainboard/google/bolt: remove unobtainable mainboard by Aaron Durbin · 8 years ago
  42. 60cc75d soc/intel/apollolake: Disable monitor mwait by Bora Guvendik · 8 years ago
  43. 4611451 Rename VB_SOURCE to VBOOT_SOURCE for increased clarity by Paul Kocialkowski · 8 years ago
  44. 94938fb chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding path by Paul Kocialkowski · 8 years ago
  45. 5f4b4c4 arch/x86: Add bootblock and postcar support for SOC MTRR access by Lee Leahy · 8 years ago
  46. ae738ac cpu/x86: Support CPUs without rdmsr/wrmsr instructions by Lee Leahy · 8 years ago
  47. 7c2e539 nb/intel/x4x: Fix CAS latency detection and max memory detection by Damien Zammit · 8 years ago
  48. 40d9349 device: include devicetree in bootblock stage by Aaron Durbin · 8 years ago
  49. 9cbc90a soc/nvidia/tegra124: remove cache_policiy option by Aaron Durbin · 8 years ago
  50. aa3e8a8 drivers/intel/fsp2_0/header_util: Convert UPD headers by Lee Leahy · 8 years ago
  51. c7dfbe2 google/oak: dsi: set mipi pin driving control on by Martin Roth · 8 years ago
  52. 700b039 meditek/mt8173: dsi: set mipi pin driving control on by Jitao Shi · 8 years ago
  53. 4cfde2a arch/x86: Generate a map file for the postcar stage by Lee Leahy · 8 years ago
  54. 99f1b2f arch/x86: Organize ramstage to match other stages by Lee Leahy · 8 years ago
  55. e82b505 arch/x86: Move romstage files into romstage section by Lee Leahy · 8 years ago
  56. a749150 arch/x86: Move postcar stage commands into place by Lee Leahy · 8 years ago
  57. 49d2330 drivers/elog: put back 4KiB limit by Aaron Durbin · 8 years ago
  58. dc4820b intel car: Use MTRR WRPROT type for XIP cache by Kyösti Mälkki · 8 years ago
  59. 9551bed intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE by Kyösti Mälkki · 8 years ago
  60. d950f51 lib: Don't require ULZMA compression for postcar by Lee Leahy · 8 years ago
  61. 27cd96a drivers/intel/fsp2_0: Enable XIP romstage with loaded FSP-M by Lee Leahy · 8 years ago
  62. e2422e3 src/lib: Enable display of cbmem during romstage and postcar by Lee Leahy · 8 years ago
  63. 3eabe6e drivers/uart: Enable debug serial output during postcar by Lee Leahy · 8 years ago
  64. b8257df intel/skylake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT by Furquan Shaikh · 8 years ago
  65. 7c7b291 intel/apollolake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT by Furquan Shaikh · 8 years ago
  66. 9dc00ef rockchip/rk3399: set CA drive strength to 48ohms by Lin Huang · 8 years ago
  67. de110ee google/gru: Change UART _Static_assert() condition to #if by Julius Werner · 8 years ago
  68. 85aa135 google/chromeos: Add support for saving recovery reason across reboot by Furquan Shaikh · 8 years ago
  69. 041bc76 google/gale: Fix board ID and GPIO config. by Kan Yan · 8 years ago
  70. 8edfc1c lib/bootmode: Use newly-add recovery module by Furquan Shaikh · 8 years ago
  71. 6d448e3 google/chromeos: Add recovery module in vboot2 by Furquan Shaikh · 8 years ago
  72. a6c5ddd vboot: Clean up vboot code by Furquan Shaikh · 8 years ago
  73. 610a33a skylake: Move CHROMEOS config to SoC by Furquan Shaikh · 8 years ago
  74. 87b1bcc apollolake: Move CHROMEOS config to SoC by Furquan Shaikh · 8 years ago
  75. b1b465f intel/amenia: Add chromeos.c to verstage by Furquan Shaikh · 8 years ago
  76. 5dd6a91 google/jecht: Increase RO coreboot size on flash by Daisuke Nojiri · 8 years ago
  77. 1e4c091 google/reef: Enable PS/2 keyboard driver by default by Duncan Laurie · 8 years ago
  78. 2c29d34 soc/intel/apollolake: ensure usb port 0 is in host mode by Aaron Durbin · 8 years ago
  79. 5d208ff drivers/elog: remove elog Kconfig variables by Aaron Durbin · 8 years ago
  80. e9a9c6a intel/haswell: Remove useless MTRR clear by Kyösti Mälkki · 8 years ago
  81. 3f22abb intel/haswell post-car: Minor fix on MTRR setting by Kyösti Mälkki · 8 years ago
  82. b37d01d3 intel/haswell: Add asmlinkage for romstage_after_car() by Kyösti Mälkki · 8 years ago
  83. a38677b cpu/x86/mtrr: correct variable MTRR calculation around 1MiB boundary by Aaron Durbin · 8 years ago
  84. 9d29c3c intel/amenia: Write protect GPIO relative to bank offset by sselvar2 · 8 years ago
  85. df7ad44 soc/intel/apollolake: Correct the gpio bank irq by Jagadish Krishnamoorthy · 8 years ago
  86. cc19806 amd/agesa/f16kb: Allow SATA Gen3 by Fabian Kunkel · 8 years ago
  87. fc4c15b google/reef: Update gpio config for audio by Sathyanarayana Nujella · 8 years ago
  88. 48f662d soc/intel/apollolake: clarify meaning of LPDDR4 density meaning by Aaron Durbin · 8 years ago
  89. dd8ed42 mainboard/google/reef: indicate dual rank LPDDR4 skus by Aaron Durbin · 8 years ago
  90. 17dbec1 soc/intel/apollolake: add dual rank option to meminit by Aaron Durbin · 8 years ago
  91. aa00e08 soc/intel/apollolake: die() when FSP silicon init fails by Aaron Durbin · 8 years ago
  92. 8a2f167 intel car: Unify postcodes by Kyösti Mälkki · 8 years ago
  93. eb61ea8 intel car: Unify whitespace and comment fixes by Kyösti Mälkki · 8 years ago
  94. 9ec6914 intel car: Remove guard on XIP_ROM_SIZE by Kyösti Mälkki · 8 years ago
  95. a27fba6 intel model_106cx: Include CAR from socket directory by Kyösti Mälkki · 8 years ago
  96. 81527e8 mainboard/google/reef: handle eMMC power signal polarity change by Aaron Durbin · 8 years ago
  97. ede69f0 mainboard/google/reef: reverse the memory config bits by Aaron Durbin · 8 years ago
  98. 150f476 timestamp: Drop duplicate TS_END_ROMSTAGE entries by Kyösti Mälkki · 8 years ago
  99. a877b74 AMD k8 fam10: Fix CAR GLOBALS late in romstage by Kyösti Mälkki · 8 years ago
  100. 67870f5 soc/intel/apollolake: Add new Intel HD Graphics Device ID's. by Abhay Kumar · 8 years ago