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review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / src / mainboard / intel
  1. 4dfdeba Reduce number of per-mainboard changes by Stefan Reinauer · 12 years ago
  2. 431a816 Move HAVE_SMI_HANDLER from mainboards to chipsets by Stefan Reinauer · 12 years ago
  3. 38109d5 SMM: Save the GNVS pointer when creating APCI tables by Duncan Laurie · 12 years ago
  4. 7f3d442 SMM: Avoid use of global variables in SMI handler by Duncan Laurie · 12 years ago
  5. c64947b Make EmeraldLake2 work again by Duncan Laurie · 12 years ago
  6. 836db26 ACPI: Zero pstate/cstate control values in FADT by Duncan Laurie · 12 years ago
  7. a93c3fe Drop redundant CHIP_NAME in mainboard.c by Kyösti Mälkki · 12 years ago
  8. bf10bc3 intel/socket_BGA956: enable speedstep, CAR, MMX, SSE by Patrick Georgi · 12 years ago
  9. 41392df Merge cpu/intel/acpi.h into cpu/intel/speedstep.h by Nico Huber · 12 years ago
  10. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  11. 89bbcf4 Use mainboard_interrupt_handlers everywhere by Patrick Georgi · 12 years ago
  12. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  13. 1c5071d Drop HAVE_MAINBOARD_RESOURCES by Kyösti Mälkki · 12 years ago
  14. 5e29f00 Intel and GFXUMA: drop redundant use of lb_add_memory_range() by Kyösti Mälkki · 12 years ago
  15. 188e3c2 Drop mainboard chip.h by Stefan Reinauer · 12 years ago
  16. fce22e8 Remove copies of rtl8168.c by Patrick Georgi · 12 years ago
  17. a306ad7 ChromeOS: Remove board specific acpi_get_vdat_info() by Stefan Reinauer · 12 years ago
  18. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  19. b405857 Remove CMOS Extended range enable from romstage by Duncan Laurie · 12 years ago
  20. 2198c58 Move GGL0001 ACPI code to generic ChromeOS code by Stefan Reinauer · 12 years ago
  21. 56c7dc7 Move subsystem IDs to devicetree.cb by Stefan Reinauer · 12 years ago
  22. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  23. 8a36634 Don't pre-enable SATA AHCI in romstage.c by Stefan Reinauer · 12 years ago
  24. 8bec7fb ChromeOS: drop unused debug header description by Stefan Reinauer · 12 years ago
  25. 2c41c40 Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards by Stefan Reinauer · 12 years ago
  26. 599e204 Clean up Emerald Lake 2 mainboard directory by Gabe Black · 12 years ago
  27. 8172d0b Allow more CPU cores on Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago
  28. f40a259 Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2. by Gabe Black · 12 years ago
  29. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  30. 5fe7a20 Set up the Emerald Lake 2 SMI and SCI sources based on the schematic. by Gabe Black · 12 years ago
  31. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago
  32. ae5e11d Move top level pc80 directory to drivers/ by Stefan Reinauer · 12 years ago
  33. 26b00e6 Refactor some alignment handling by Patrick Georgi · 12 years ago
  34. a4fa814 cmos.layout: Remove invalid warning by Vikram Narayanan · 12 years ago
  35. eb5e28f Intel northbridge I945: Apply un-written naming rules by Kyösti Mälkki · 12 years ago
  36. c8feedd Unify Local APIC address definitions by Patrick Georgi · 12 years ago
  37. 4c796ea Ati video: Apply un-written naming rules by Kyösti Mälkki · 12 years ago
  38. 91bd306 ACPI: More ../../.. removal by Patrick Georgi · 12 years ago
  39. c46f450 intel/i82801cx: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  40. 7389378 intel/i82801ex: Move HAVE_HARD_RESET to southbridge by Patrick Georgi · 12 years ago
  41. e13632a Intel cpus: apply un-written naming rules by Kyösti Mälkki · 12 years ago
  42. 751508a northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig option by Peter Stuge · 12 years ago
  43. 28bdd8d i3100: Add HAVE_HARD_RESET by Sven Schnelle · 13 years ago
  44. 4c2bfb6 remove usbdebug.h include from mainboard/romstage code by Sven Schnelle · 13 years ago
  45. 914377e Get rid of the old romstage-as-bootblock ROM layout by Patrick Georgi · 13 years ago
  46. a251dee Use default table creator macro for all SSDTs by Stefan Reinauer · 13 years ago
  47. b0a9c5c mptable: Refactor mptable generation some more by Patrick Georgi · 13 years ago
  48. c75c79b mptable: Get rid of fixup_virtual_wire by Patrick Georgi · 13 years ago
  49. 6eb7a53 mptable: Refactor lintsrc generation by Patrick Georgi · 13 years ago
  50. 03f82bd Use ACPI text fields consistently with all other boards by Stefan Reinauer · 13 years ago
  51. 164bcfd Add automatic SMBIOS table generation by Sven Schnelle · 13 years ago
  52. d4dc9a5 Remove old ACPI code by Sven Schnelle · 13 years ago
  53. d8c68a9 i82801gx: replace cafed00d/cafebabe by defines by Sven Schnelle · 13 years ago
  54. f4dc1a7 SMM: add defines for APM_CNT register by Sven Schnelle · 13 years ago
  55. 9cb1756 AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards. by Stefan Reinauer · 13 years ago
  56. 42fa7fe run uart_init() from console_init, just like the other console initialization functions. by Stefan Reinauer · 13 years ago
  57. b3ae186 * Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value by Stefan Reinauer · 13 years ago
  58. 8345a19 fix mainboards that were including earlymtrr.c without actually using it. by Stefan Reinauer · 13 years ago
  59. 9132102 Use subsystem id from devicetree.cb instead of Kconfig and move by Sven Schnelle · 13 years ago
  60. 541269b [i945] Add SPD adress mapping by Sven Schnelle · 13 years ago
  61. c36d506 Get mptable OEM/product ID from kconfig variables. by Uwe Hermann · 14 years ago
  62. 475916d Compile cbmem.c instead of including it in romstage, by Rudolf Marek · 14 years ago
  63. 8677a23 After this has been brought up many times before, rename src/arch/i386 to by Stefan Reinauer · 14 years ago
  64. d351925 Move "select CACHE_AS_RAM" lines from boards into CPU socket. by Uwe Hermann · 14 years ago
  65. 8301d83 second round name simplification. drop the <component>_ prefix. by stepan · 14 years ago
  66. 836ae29 first round name simplification. drop the <component>_ prefix. by stepan · 14 years ago
  67. 4028ce7 Get rid of some unneeded function prototypes in romstage.c files. by Uwe Hermann · 14 years ago
  68. 0d5a6ac Drop per-board ram_check() calls for now. by Uwe Hermann · 14 years ago
  69. 7411eab Final set of smp_write_bus -> mptable_write_buses changes. by Patrick Georgi · 14 years ago
  70. 7b99705 Simplify a few code chunks, fix whitespace and indentation. by Uwe Hermann · 14 years ago
  71. 57b2ff8 Drop excessive whitespace randomly sprinkled in romstage.c files. by Uwe Hermann · 14 years ago
  72. 5244e1b Convert more boards to use mptable_write_buses. by Patrick Georgi · 14 years ago
  73. 6dc92f0 Use DIMM0 et al in lots more places instead of hardocding values. by Uwe Hermann · 14 years ago
  74. d773fd3 Some more DIMM0 related cleanups and deduplication. by Uwe Hermann · 14 years ago
  75. 9bd9a90 Unify DIMM SPD addressing. For Geode, change the by Patrick Georgi · 14 years ago
  76. 607614d Fix/drop some obsolete comments, by Uwe Hermann · 14 years ago
  77. 8c107bc Move DIMM_MAP_LOGICAL to Kconfig. by Patrick Georgi · 14 years ago
  78. 9e18038 Move register block definitions out of board code into by Patrick Georgi · 14 years ago
  79. 361bd10 Move Intel power management related defines to some central location. by Patrick Georgi · 14 years ago
  80. 3226cf8 Drop commented out debug defines by Patrick Georgi · 14 years ago
  81. c2bf26d Move RCBA defines to northbridge (instead of mainboard) by Patrick Georgi · 14 years ago
  82. d1a1d57 Restructure i3100 Super I/O driver to match the rest of the codebase. by Uwe Hermann · 14 years ago
  83. 68854f3 Remove unused defines (UART_*) by Patrick Georgi · 14 years ago
  84. f9892166 Remove incorrect IOAPIC lines from some mptable.c files. by Uwe Hermann · 14 years ago
  85. bb42300 Drop duplicate HAVE_ACPI_TABLES (trivial). by Uwe Hermann · 14 years ago
  86. b907d32 We need to call smp_write_lintsrc() instead of smp_write_intsrc() for by Tobias Diedrich · 14 years ago
  87. 55dc223 Factor out common mptable code to mptable_init(). by Uwe Hermann · 14 years ago
  88. 7c1fb7b Running a checked build of Windows is needed for understanding its various BIOS related BSODs. Win7 checked build complains when running coreboot+seabios: by Scott Duplichan · 14 years ago
  89. 212d0a2 Remove various .c #includes from Intel i810/i82801ax/i82801bx boards. by Uwe Hermann · 14 years ago
  90. ab50d62 Convert all Intel i810 boards to CAR. by Uwe Hermann · 14 years ago
  91. 74d1a6e We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it. by Uwe Hermann · 14 years ago
  92. 5692c57 - move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1 by Patrick Georgi · 14 years ago
  93. d083595 Remove lib/ramtest.c-include from all CAR boards. by Patrick Georgi · 14 years ago
  94. 6f56ad2 Remove a couple of defines that seem to be the result of by Patrick Georgi · 14 years ago
  95. e4bc0f6 Split NORTHBRIDGE_INTEL_I945 into more precise _I945GC and _I945GM by Peter Stuge · 14 years ago
  96. 77d6683 Move several i945 config #defines from romstage.c to Kconfig. by Patrick Georgi · 14 years ago
  97. 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 14 years ago
  98. 7571c0b This patch moves one of the CAR configs to the socket from the single by Warren Turkal · 14 years ago
  99. 024d248 i82801bx defines the hard reset function, so move the "select" statement to by Warren Turkal · 14 years ago
  100. 09f5182 Remove hard reset config from some mainboard configs by Warren Turkal · 14 years ago