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review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / src / mainboard / intel / emeraldlake2
  1. 4dfdeba Reduce number of per-mainboard changes by Stefan Reinauer · 12 years ago
  2. 431a816 Move HAVE_SMI_HANDLER from mainboards to chipsets by Stefan Reinauer · 12 years ago
  3. 38109d5 SMM: Save the GNVS pointer when creating APCI tables by Duncan Laurie · 12 years ago
  4. 7f3d442 SMM: Avoid use of global variables in SMI handler by Duncan Laurie · 12 years ago
  5. c64947b Make EmeraldLake2 work again by Duncan Laurie · 12 years ago
  6. 836db26 ACPI: Zero pstate/cstate control values in FADT by Duncan Laurie · 12 years ago
  7. a93c3fe Drop redundant CHIP_NAME in mainboard.c by Kyösti Mälkki · 12 years ago
  8. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  9. 89bbcf4 Use mainboard_interrupt_handlers everywhere by Patrick Georgi · 12 years ago
  10. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  11. 1c5071d Drop HAVE_MAINBOARD_RESOURCES by Kyösti Mälkki · 12 years ago
  12. 5e29f00 Intel and GFXUMA: drop redundant use of lb_add_memory_range() by Kyösti Mälkki · 12 years ago
  13. 188e3c2 Drop mainboard chip.h by Stefan Reinauer · 12 years ago
  14. a306ad7 ChromeOS: Remove board specific acpi_get_vdat_info() by Stefan Reinauer · 12 years ago
  15. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  16. b405857 Remove CMOS Extended range enable from romstage by Duncan Laurie · 12 years ago
  17. 2198c58 Move GGL0001 ACPI code to generic ChromeOS code by Stefan Reinauer · 12 years ago
  18. 56c7dc7 Move subsystem IDs to devicetree.cb by Stefan Reinauer · 12 years ago
  19. 8a36634 Don't pre-enable SATA AHCI in romstage.c by Stefan Reinauer · 12 years ago
  20. 8bec7fb ChromeOS: drop unused debug header description by Stefan Reinauer · 12 years ago
  21. 2c41c40 Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards by Stefan Reinauer · 12 years ago
  22. 599e204 Clean up Emerald Lake 2 mainboard directory by Gabe Black · 12 years ago
  23. 8172d0b Allow more CPU cores on Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago
  24. f40a259 Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2. by Gabe Black · 12 years ago
  25. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  26. 5fe7a20 Set up the Emerald Lake 2 SMI and SCI sources based on the schematic. by Gabe Black · 12 years ago
  27. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago