Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 9ef9d85976fcfc5f4c8c273eaf3377fdd6e5c24d / src / soc / intel / baytrail / southcluster.c
  1. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  2. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  3. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  4. 99a3bba intel/baytrail: Spelling fixes by Martin Roth · 10 years ago
  5. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  6. 3511023 baytrail/rambi: S3 support and other updates by Kein Yuan · 10 years ago
  7. 4177db5 baytrail/rambi: spi, charger, and audio updates by Aaron Durbin · 11 years ago
  8. 51d787a rambi/baytrail: ACPI, GPIO, audio, misc updates by Shawn Nematbakhsh · 11 years ago
  9. 1af3663 baytrail: configure acpi SCI irq by Aaron Durbin · 11 years ago
  10. 3bde3d7 baytrail: interrupt routing support by Aaron Durbin · 11 years ago
  11. 7fbe20b baytrail: Add reserved MMIO regions to ACPI by Duncan Laurie · 11 years ago
  12. 46ab8cd baytrail: HDA function disable workaround by Aaron Durbin · 11 years ago
  13. 1eae3ee baytrail: allow function disable on TXE by Aaron Durbin · 11 years ago
  14. 5d53554 rambi: Enable internal keyboard by Duncan Laurie · 11 years ago
  15. d7bc23a baytrail: add support for disabling south cluster pci devices by Aaron Durbin · 11 years ago
  16. e18d68f baytrail: add south cluster fixed resources by Aaron Durbin · 11 years ago