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review.coreboot.org / coreboot / 9cd7eba1180396cbd91776a94444696f6b4069c4 / src
  1. 8ae82e3 Remove the code for debugging. by Zheng Bao · 14 years ago
  2. a4da254 S3 feanture of SB800. Compiliant with SB700. by Zheng Bao · 14 years ago
  3. 79c04d5 Move some board specific functions to sb800.h. by Zheng Bao · 14 years ago
  4. 8210e89 Features of Bimini board: RS785 SB800 by Zheng Bao · 14 years ago
  5. d098575 This sb800 code is derived from sb700. by Zheng Bao · 14 years ago
  6. dd676dd For Cx, each ChipSel need to be sent MR command. by Zheng Bao · 14 years ago
  7. c29675f Add a GX2 Kconfig option to choose the framebuffer size. by Nils Jacobs · 14 years ago
  8. 7b0500c Revert r5902 to make code more readable again. At least three people like to by Stefan Reinauer · 14 years ago
  9. 5bb9fd6 Now that the VIA code is run above 1Meg (like other boards), it should by Kevin O'Connor · 14 years ago
  10. 4adc9eb The cn700.c code references mainboard_interrupt_handlers() which isn't by Kevin O'Connor · 14 years ago
  11. cef3b89 Report if cmos_layout.bin can't be found when it should. by Patrick Georgi · 14 years ago
  12. 2447937 Move option table (cmos.layout's binary representation) by Patrick Georgi · 14 years ago
  13. a19c622 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  14. 752ab0d remove the code which is not ready to release. by Zheng Bao · 14 years ago
  15. 078efb5 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  16. 1021901 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  17. a7296e7 The code is tested on my board with register DIMMs. More tests need to be by Zheng Bao · 14 years ago
  18. a112523 Ooops lets see if this extra comment removal fixes this. by Rudolf Marek · 14 years ago
  19. aa55f37 Trivial, cleanup of GPIO comments. by Rudolf Marek · 14 years ago
  20. c3dc8f8 Disable CMOS recovery code for ROMCC boards as the CBFS code used for by Patrick Georgi · 14 years ago
  21. ef32965 Improved GPIO setup for roda/rk886ex, and some documentation by Patrick Georgi · 14 years ago
  22. a865b17 Allow coreboot to initialize CMOS if checksum is invalid. by Patrick Georgi · 14 years ago
  23. 4c8e269 Default to CRT on Kontron/986lcd-m. "default display" doesn't always by Patrick Georgi · 14 years ago
  24. 9144304 Improve compatibility of YABEL with real-world VGABIOSes by Patrick Georgi · 14 years ago
  25. fb433be drop unused files by Stefan Reinauer · 14 years ago
  26. 09e0e9a change a readable way to fix SB800 CIMX "multi-character constant warning". by Kerry She · 14 years ago
  27. 965c43b Various Nokia IP530 fixes. by Marc Bertens · 14 years ago
  28. 69436e1 Fix some settings fo AMD MCT. It is based on BIOS test suite. by Zheng Bao · 14 years ago
  29. da712f3 uart_init is only used in romstage. by Stefan Reinauer · 14 years ago
  30. 1b34226 move single options out of main menu and remove stray "options" by Stefan Reinauer · 14 years ago
  31. c7f0c8f MCP55: Cosmetic fixes, switch to u8 et al. by Uwe Hermann · 14 years ago
  32. 7e2fbd5 CK804: Cosmetic fixes, switch to u8 et al. by Uwe Hermann · 14 years ago
  33. ecab12a Trivial: by Kerry She · 14 years ago
  34. 7917f43 Trivial: use the IO_APIC_ADDR constant defined in ioapic.h, and spell check by Kerry She · 14 years ago
  35. e925965 src/southbridge/amd/cimx_wrapper: Run dos2unix on the files. by Uwe Hermann · 14 years ago
  36. d6a1373 AMD SB800: Drop component prefix from filenames. by Uwe Hermann · 14 years ago
  37. 48b8b92 AMD Bimini: Use mptable_init() in mptable.c. by Uwe Hermann · 14 years ago
  38. 26c1823 AMD Bimini: Small fixes, and updates to recent trunk conventions. by Uwe Hermann · 14 years ago
  39. f7e7519 AMD Bimini: Drop duplicate ASL files as we did for other boards. by Uwe Hermann · 14 years ago
  40. ee5fcac Add support for the AMD Bimini eval mainboard. by Kerry She · 14 years ago
  41. 84f59ae Add AMD SB800 southbridge support via cimx_wrapper. by Kerry She · 14 years ago
  42. 799fed9 Add AMD SB800 southbridge CIMx code. by Kerry She · 14 years ago
  43. 40992d3 Add RS785(RS880) support. Just few pci_ids. by Zheng Bao · 14 years ago
  44. 8098e42 Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code by Nils Jacobs · 14 years ago
  45. 8cf54c9 Use die() to assure the processor can't wake up from an interrupt. by Nils Jacobs · 14 years ago
  46. f1939bb Per default, use SeaBIOS payload instead of no payload. by Stefan Reinauer · 14 years ago
  47. 84be0f5 -Change the remaining GLIU1 port 5 register names from VIP (Video Input Port) by Nils Jacobs · 14 years ago
  48. cdcf983 fix i810 boards with ram init debugging disabled. by Stefan Reinauer · 14 years ago
  49. ef15ff4 -Clean up some comments. by Nils Jacobs · 14 years ago
  50. fc01e5e proper printk handling in src/northbridge/intel/i82810/raminit.c by Stefan Reinauer · 14 years ago
  51. 50e7233 __PRE_RAM__ is defined by the makefile by Stefan Reinauer · 14 years ago
  52. 1c2c750 dump_spd_registers() is only defined when ram init debugging is on. by Stefan Reinauer · 14 years ago
  53. 3c0bfaf Fix most CONFIG_DEBUG_RAM_SETUP issues. by Stefan Reinauer · 14 years ago
  54. acda2fc Intel SCH: make state machine binary selection available in Kconfig for now. by Stefan Reinauer · 14 years ago
  55. a35eb2c All the values should stay untouched or be set automatically by the resource by Stefan Reinauer · 14 years ago
  56. 2d1d9ceb Random fixes for TI pci1x2x / Nokia IP530 / others. by Uwe Hermann · 14 years ago
  57. 19d69e3 Move Geode GX2 UMA video memory size to Kconfig by Nils Jacobs · 14 years ago
  58. 642509c Remove dead and unused Geode GX2 code by Nils Jacobs · 14 years ago
  59. 3344743 Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names by Nils Jacobs · 14 years ago
  60. 1c6d4e6 Clean up Geode GX2 comments, whitespace and coding style. Trivial. by Nils Jacobs · 14 years ago
  61. 88929f9 Nokia IP530: Add missing "select SDRAMPWR_4DIMM". by Uwe Hermann · 14 years ago
  62. 09f5a74 Fix build with CONFIG_DEBUG_RAM_SETUP on Intel 440BX, use printk(). by Keith Hui · 14 years ago
  63. bccbbe6 The same mechanisms are used for normal and fallback images. by Stefan Reinauer · 14 years ago
  64. a05ddbc ASUS M2N-E: Enable PCI-E x16 slot. by Uwe Hermann · 14 years ago
  65. 2c36627 SMM on AMD K8 Part 2/2 by Rudolf Marek · 14 years ago
  66. cadc545 SMM for AMD K8 Part 1/2 by Stefan Reinauer · 14 years ago
  67. 405721d Fix a few whitespace and coding style issues. by Uwe Hermann · 14 years ago
  68. a0360af A couple of Poulsbo fixes: by Patrick Georgi · 14 years ago
  69. be61a17 Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board which uses it. by Patrick Georgi · 14 years ago
  70. 397ff68 Remove some more unused/incorrect hda_verb.h files. by Uwe Hermann · 14 years ago
  71. 3817494 fix the tree again. by Stefan Reinauer · 14 years ago
  72. 6559f43 add license headers to some trivial files and pc87427.h by Stefan Reinauer · 14 years ago
  73. 85b0fa1 drop one more version of doing serial uart output differently. by Stefan Reinauer · 14 years ago
  74. efbfd50 guard against the case that CONFIG_WAIT_BEFORE_CPUS_INIT is not defined at all. by Stefan Reinauer · 14 years ago
  75. 43c1a21 drop unused code in div64.h by Stefan Reinauer · 14 years ago
  76. 0d3e12b print what make is doing (CBFS call) by Stefan Reinauer · 14 years ago
  77. 5fb6216 don't hardcode CONFIG_PC80_SYSTEM by Stefan Reinauer · 14 years ago
  78. 8aedcbc - Fix shortcoming in Kconfig when handling multiple "choice"s by Stefan Reinauer · 14 years ago
  79. 259a39f fix according to coding guidelines by Stefan Reinauer · 14 years ago
  80. b9c224e Add TINY_BOOTBLOCK support for the SiS966 southbridge. by Uwe Hermann · 14 years ago
  81. c36d506 Get mptable OEM/product ID from kconfig variables. by Uwe Hermann · 14 years ago
  82. c2c23dc Add support for cbfs-files-y to the build system. by Patrick Georgi · 14 years ago
  83. 8d0d671 Build fix. by Uwe Hermann · 14 years ago
  84. 41dc1c0 Cleanup up HD audio codec / hda_verb.h files. by Uwe Hermann · 14 years ago
  85. bb9bcee Set the ROMSIZE as 4MB. by Zheng Bao · 14 years ago
  86. dd6619f no leading zeroes. by Stefan Reinauer · 14 years ago
  87. cc1e645 Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3. by Rudolf Marek · 14 years ago
  88. 52ff065 This patch just turns on the ACPI resume. by Rudolf Marek · 14 years ago
  89. 475916d Compile cbmem.c instead of including it in romstage, by Rudolf Marek · 14 years ago
  90. c436953 Following patch adds support for suspend/resume functions. I had to change the get_cbmem_toc because macro magic did not work well. by Rudolf Marek · 14 years ago
  91. 59f410f Following patch adds support to bring out the memory out of self refresh when doing resume. by Rudolf Marek · 14 years ago
  92. 97be27e We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic. by Rudolf Marek · 14 years ago
  93. 29c7dfca Add support for the ASUS M2N-E board. by Uwe Hermann · 14 years ago
  94. dfeb04d fix model 106cx by Stefan Reinauer · 14 years ago
  95. 4041925 Fix the build failure. We have now common fadt.c. by Rudolf Marek · 14 years ago
  96. e8191b4 I was bitten by the rename, this is part of r6165. by Rudolf Marek · 14 years ago
  97. 3310934 Following patch makes just one fadt.c file. For SB700. by Rudolf Marek · 14 years ago
  98. 2a27b20 factor out cpu power management base into a separate file. And fix a bug in by Stefan Reinauer · 14 years ago
  99. 2b9070a catch some illegal configurations (trivial) by Stefan Reinauer · 14 years ago
  100. 8677a23 After this has been brought up many times before, rename src/arch/i386 to by Stefan Reinauer · 14 years ago