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review.coreboot.org / coreboot / 98fcc09cf9955e24376d15f6fe13f02545547276 / src / southbridge / amd
  1. 98fcc09 Add AMD SR56x0 support. by Zheng Bao · 13 years ago
  2. ea1c0a7 Fix power_on_after_fail handling on AMD SB600 by Josef Kellermann · 13 years ago
  3. 199c694 It adds support for automatic PSS object generation for AMD pre fam Fh CPU. Those CPUs require a hardcoded table, which I managed to rewrite during one particularly boring flight. Too pity it is only for Opteron CPUs. Someone needs to finish the second PDF for All others Athlons and Semprons. by Rudolf Marek · 13 years ago
  4. 855224b Add new option 'sata_mode' to CMOS and 'SATA_MODE' to Kconfig for AMD SB600 by Josef Kellermann · 13 years ago
  5. dd6c1e6 SERIAL_POST was renamed to CONSOLE_POST a while ago by Stefan Reinauer · 14 years ago
  6. cf37a59 Removed LPC DMA Deadlock workaround... by Josef Kellermann · 14 years ago
  7. 63e62b0 This code provides southbridge initialization for SB800 south bridges. It is dependent on the AMD CIMx/SB800 code. by Frank Vibrans · 14 years ago
  8. 74ad66c Attached patch fixes the LPC decode ranges of SB600/SB800. We enable early only Serial/SIO/RTC. by Rudolf Marek · 14 years ago
  9. 20ecc5a RS690: Provide support for MMCONF. by Josef Kellermannseppk · 14 years ago
  10. a96b218 Fix subvendor/subdevice programming on RS690 by Josef Kellermann · 14 years ago
  11. 86bd99a by Rudolf Marek · 14 years ago
  12. 1c2734f Fix Bimini build by Stefan Reinauer · 14 years ago
  13. a5c949e Trivial. Re-indent the code. by Zheng Bao · 14 years ago
  14. 066cbe0 Set the phy via weak function. As Rudolf called. by Zheng Bao · 14 years ago
  15. 9dcca3b Set the SB800 SATA PHY correctly. by Zheng Bao · 14 years ago
  16. a302b58 Change fadt revision back to 3. by Zheng Bao · 14 years ago
  17. 72cc87f Now bimini can boot linux to login. by Zheng Bao · 14 years ago
  18. a4da254 S3 feanture of SB800. Compiliant with SB700. by Zheng Bao · 14 years ago
  19. 79c04d5 Move some board specific functions to sb800.h. by Zheng Bao · 14 years ago
  20. d098575 This sb800 code is derived from sb700. by Zheng Bao · 14 years ago
  21. a19c622 remove the code which is not ready to release. by Zheng Bao · 14 years ago
  22. 752ab0d remove the code which is not ready to release. by Zheng Bao · 14 years ago
  23. fb433be drop unused files by Stefan Reinauer · 14 years ago
  24. 09e0e9a change a readable way to fix SB800 CIMX "multi-character constant warning". by Kerry She · 14 years ago
  25. e925965 src/southbridge/amd/cimx_wrapper: Run dos2unix on the files. by Uwe Hermann · 14 years ago
  26. d6a1373 AMD SB800: Drop component prefix from filenames. by Uwe Hermann · 14 years ago
  27. 84f59ae Add AMD SB800 southbridge support via cimx_wrapper. by Kerry She · 14 years ago
  28. 40992d3 Add RS785(RS880) support. Just few pci_ids. by Zheng Bao · 14 years ago
  29. 8098e42 Remove duplicated GX2 processor IIOC mode setting on CS5535 southbridge code by Nils Jacobs · 14 years ago
  30. 84be0f5 -Change the remaining GLIU1 port 5 register names from VIP (Video Input Port) by Nils Jacobs · 14 years ago
  31. ef15ff4 -Clean up some comments. by Nils Jacobs · 14 years ago
  32. bb9bcee Set the ROMSIZE as 4MB. by Zheng Bao · 14 years ago
  33. c436953 Following patch adds support for suspend/resume functions. I had to change the get_cbmem_toc because macro magic did not work well. by Rudolf Marek · 14 years ago
  34. e8191b4 I was bitten by the rename, this is part of r6165. by Rudolf Marek · 14 years ago
  35. 3310934 Following patch makes just one fadt.c file. For SB700. by Rudolf Marek · 14 years ago
  36. 6e7efb7 Add TINY_BOOTBLOCK support for AMD SB700. by Uwe Hermann · 14 years ago
  37. 42b1c43 Merge enable_rom.c files into bootblock.c files. by Uwe Hermann · 14 years ago
  38. 4a778db Add missing instruction break. by Zheng Bao · 14 years ago
  39. 836ae29 first round name simplification. drop the <component>_ prefix. by stepan · 14 years ago
  40. 29cb06a Before lane reversal, by Zheng Bao · 14 years ago
  41. 6b8c721 Trivial. Reindent and dos2unix. by Zheng Bao · 14 years ago
  42. e89d8a5 AMD SB600: Add TINY_BOOTBLOCK support. by Uwe Hermann · 14 years ago
  43. 1f7d3c5 AMD-8111: Add TINY_BOOTBLOCK support. by Uwe Hermann · 14 years ago
  44. 88dc531 This patch solves crashes and BSODs that occur when booting Win7 with by Scott Duplichan · 14 years ago
  45. 9bd9a90 Unify DIMM SPD addressing. For Geode, change the by Patrick Georgi · 14 years ago
  46. 1c00927 Revert sblk/sblink change, use sblk like the rest of the codebase does. by Uwe Hermann · 14 years ago
  47. d7acdfb This patch enables SB700 option PrefetchEnSPIFromHost in early setup. by Scott Duplichan · 14 years ago
  48. 676d029 In the RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set by Liu Tao · 14 years ago
  49. dfecd27 We currently read the CPU HT speed from HT chain 0's register. by Liu Tao · 14 years ago
  50. c6a1062 Add more missing GPL-headers, fix inconsistencies in others. by Uwe Hermann · 14 years ago
  51. 51eafde Enable or disable the power button in Kconfig by Peter Stuge · 14 years ago
  52. f2573bd Fix a stupid bug in rs780 and rs690 code. by Zheng Bao · 14 years ago
  53. 74d1a6e We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it. by Uwe Hermann · 14 years ago
  54. 470e182 Same applies for SB600. by Rudolf Marek · 14 years ago
  55. e522164 by Rudolf Marek · 14 years ago
  56. 14cc927 Following patch enables UDMA on ALL IDE devices. The current code enables it only for primary master, which causes my DVD drive to fail under windows install by Rudolf Marek · 14 years ago
  57. 2a5101a Trivial. Spelling check. by Zheng Bao · 14 years ago
  58. a3bd1b1 RS780 function ProgK8TempMmioBase is setting a reserved by Scott Duplichan · 14 years ago
  59. 5692c57 - move EHCI_BAR_INDEX to ehci.h - it's constant as per EHCI spec 2.3.1 by Patrick Georgi · 14 years ago
  60. ae3f2b3 Allow selecting the physical USB Debug Port on AMD SB700. by Uwe Hermann · 14 years ago
  61. 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 14 years ago
  62. 65e6034 Only show the USB Debug Port kconfig option to the user if a mainboard by Uwe Hermann · 14 years ago
  63. dc3aa7a Various Debug Port southbridge implementation fixes / cosmetics. by Uwe Hermann · 14 years ago
  64. ff492b1 Make SB600/SB700 more similar for easier diffs (trivial). by Uwe Hermann · 14 years ago
  65. b015d02 Hook up all AMD SB600/SB700 boards to the EHCI Debug Port infrastructure. by Uwe Hermann · 14 years ago
  66. 7df50a8 Here is a proposed way how to handle the SATA PHY settings on SB700. It by Rudolf Marek · 14 years ago
  67. 50b78b6 Print an error and correct pci scan limits. Skip sb700 ISA DMA init if needed. by Juhana Helovuo · 14 years ago
  68. a4c0a1d Make timer2 the default choice for TSC initialization. by Patrick Georgi · 14 years ago
  69. 625a0cb Remove unused ide0_enable and sata0_enable entries from SB7xx and SB600. by Rudolf Marek · 14 years ago
  70. 543f767 Tilapila supports both dual slot and single slot. The difference should be by Wang Qing Pei · 14 years ago
  71. ae7a425 Look for actual framebuffer size instead of hardcoding UMA by Rudolf Marek · 14 years ago
  72. 52a3c3b Feature of lane reversal of AMD RS780 is tested. by Zheng Bao · 14 years ago
  73. 0362c6d VGA code needs to be refactored before it can be compiled conditionally. by Myles Watson · 14 years ago
  74. 2d7ff69 Build VGA code conditionally to avoid errors when using SeaBIOS. by Myles Watson · 14 years ago
  75. bba0d76 Let Geode GX2 use geode_post_code.h just like Geode LX by Nils Jacobs · 14 years ago
  76. e474070 This patch converts the Geode GX2 boards to CAR. by Nils Jacobs · 14 years ago
  77. 817d754 get rid of even more fam10 and k8 warnings. by Stefan Reinauer · 14 years ago
  78. 5e33e82 fix some more warnings by Stefan Reinauer · 14 years ago
  79. bfca8ef Trivial. Cleaning up about the blank line. by Zheng Bao · 14 years ago
  80. 7eac445 Always enable parent resources before child resources. by Myles Watson · 14 years ago
  81. 894a347 Same conversion as with resources from static arrays to lists, except by Myles Watson · 14 years ago
  82. 42e5f64 The interrupt controller lives at I/O 0x4d0/0x4d1. by Stefan Reinauer · 14 years ago
  83. 81af48e This patch extends the reserved resources for the cs5536 to avoid the excluded by Myles Watson · 14 years ago
  84. c282a18 This patch replaces the headers of the following files: by Frank Vibrans · 14 years ago
  85. 5d6aede The code was ported. Now it is what it should be. by Zheng Bao · 14 years ago
  86. 2305f74 Move CS5535 specific setup from GX2 driver to CS5535. by Stefan Reinauer · 14 years ago
  87. 7e00a44 also rename the config option. by Stefan Reinauer · 14 years ago
  88. 75a05dc fix most usbdebug warnings and fix function names. by Stefan Reinauer · 14 years ago
  89. da32373 Long ago we agreed on kicking the _direct appendix because everything in by Stefan Reinauer · 14 years ago
  90. ae3f4b5 Fix bug from r5476 re CS5536 device search during GeodeLX PCI domain enable by Peter Stuge · 14 years ago
  91. c25cc11 Use lists instead of arrays for resources in devices to reduce memory usage. by Myles Watson · 14 years ago
  92. dd6ad34 license header fixes by Nils Jacobs · 14 years ago
  93. c8873ce get rid of some more warnings.. by Stefan Reinauer · 14 years ago
  94. 14e2277 Since some people disapprove of white space cleanups mixed in regular commits by Stefan Reinauer · 14 years ago
  95. 467a065 no warnings days. by Stefan Reinauer · 14 years ago
  96. d55e26f zero warnings days by Stefan Reinauer · 14 years ago
  97. 116ec61 zero warnings days... by Stefan Reinauer · 14 years ago
  98. 4292685 None of the cs5536 settings in devicetree.cb were ever used and nobody noticed. by Stefan Reinauer · 14 years ago
  99. ba09695 fix compilation remaining geode boards by Stefan Reinauer · 14 years ago
  100. 9839cbd * clean up all but two warnings on artecgroup dbe61 by Stefan Reinauer · 14 years ago