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review.coreboot.org / coreboot / 975ffc2e0f5e796384bebf6fce19b47dc2077f6a
  1. 68b5da0e Use ld manually when compiling with clang by Patrick Georgi · 12 years ago
  2. bb31f3a Drop config variable CPU_MODEL_INDEX by Stefan Reinauer · 12 years ago
  3. 14b23a6 Fix compilation with CONFIG_DEBUG_SPI_FLASH enabled by Stefan Reinauer · 12 years ago
  4. 71695d8 Fix full reset for Ivy Bridge platforms by Vadim Bendebury · 12 years ago
  5. 984f954 ChromeOS: Remove remnants of FDT support by Stefan Reinauer · 12 years ago
  6. 88fc0b9 Sandybridge: Remove remnants of FDT support from MRC cache code by Stefan Reinauer · 12 years ago
  7. 6e901fd Sandybridge: Fix MRC cache calculation by Stefan Reinauer · 12 years ago
  8. 206c890 Enable USE_OPTION_TABLE for ThinkPad X60 by Motiejus Jakštys · 12 years ago
  9. bfff6de Implement %zu / %zd in printk by Stefan Reinauer · 12 years ago
  10. 56c7dc7 Move subsystem IDs to devicetree.cb by Stefan Reinauer · 12 years ago
  11. 5649b08 Reduce default verbosity of SPI flash drivers by Stefan Reinauer · 12 years ago
  12. 8ea5a34 Fix printk types in SPI flash drivers by Stefan Reinauer · 12 years ago
  13. 872e74d Fix typo on Persimmon #if CONFIG_HAVE_ACPI_RESUME by Marc Jones · 12 years ago
  14. 9981cad nvramtool: use C99 PRIx64 / PRId64 for uint64_t variables by Stefan Reinauer · 12 years ago
  15. 0e740d3 Fix size_t for certain versions of GCC by Stefan Reinauer · 12 years ago
  16. 1b1309f Add EM100 mode to Intel Firmware Descriptor tool by Stefan Reinauer · 12 years ago
  17. 89ba15a chromeos: Fix compilation of coreboot-utils package by Stefan Reinauer · 12 years ago
  18. f026912 Converted the FRAMEBUFFER_VESA_MODE to a choice. by Steve Goodrich · 12 years ago
  19. 92ff934 abuild: Disable abuild-level parallelism for now by Patrick Georgi · 12 years ago
  20. 2f00ce3 cbtypes.h: Unify cbtypes.h used in AMD board's code by Vikram Narayanan · 12 years ago
  21. ad422c0 Fix Persimmon build without S3. by Marc Jones · 12 years ago
  22. ba3711c Fix fadt legacy free setting. by Marc Jones · 12 years ago
  23. 762aa3e Change the name of the romstage bootblock.ld by Marc Jones · 12 years ago
  24. 49fe74b Fix Cygwin bootblock generation by Marc Jones · 12 years ago
  25. c2dff7f Pass IASL to SeaBIOS by Marc Jones · 12 years ago
  26. 20959ba SPI driver: style fix by Patrick Georgi · 12 years ago
  27. 5fb2b5c crossgcc: Test for m4 and bison by Patrick Georgi · 12 years ago
  28. 6e61ad3 crossgcc: update sources by Patrick Georgi · 12 years ago
  29. 64d9a77 abuild: Move configuration handling together by Patrick Georgi · 12 years ago
  30. 2ea8e86 abuild: Remove abuild.info hack by Patrick Georgi · 13 years ago
  31. 7c9ef4f Add legacy free setting and override to fadt.c by Marc Jones · 12 years ago
  32. b547c4f Merge sb800 fadt fixes from South Station mainboard to southbridge fadt. by Marc Jones · 12 years ago
  33. bb11e60 Hook up MRC cache update by Stefan Reinauer · 12 years ago
  34. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  35. 1c56d9b Add SPI flash driver by Stefan Reinauer · 12 years ago
  36. 43105d6 abuild: Build boards in parallel if possible by Patrick Georgi · 13 years ago
  37. a495335 CIMx: Allow #define LEGACY_FREE overrides by Martin Roth · 12 years ago
  38. 923d200 Unmark source files as executables by Alec Ari · 12 years ago
  39. 5db1f46 Integrate MA785GM-US2H to Kconfig by Alec Ari · 12 years ago
  40. eb129bb Update SeaBIOS URL by Patrick Georgi · 12 years ago
  41. 76cfcbc Move fadt.c to the cimx sb800 southbridge directory to be shared. by Marc Jones · 12 years ago
  42. 7b860ed Add simple PMIO & PMIO2 read/write routines to CIMX wrapper by Martin Roth · 12 years ago
  43. 4781800 Don't loop infinitely long on serial comm failures by Stefan Reinauer · 12 years ago
  44. 564e90f Add a tool to work on i915 hardware in user mode by Stefan Reinauer · 12 years ago
  45. 44a89b3 Fix build with CMOS support on various platforms by Patrick Georgi · 12 years ago
  46. f8f0062 Some more #if cleanup by Patrick Georgi · 12 years ago
  47. c0e16e7 Add config_enabled() from Linux by Patrick Georgi · 12 years ago
  48. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  49. fe42218 Make CBFS output more consistent by Stefan Reinauer · 12 years ago
  50. 872eb79 siemens/sitemp_g1p1: Drop debug code by Patrick Georgi · 13 years ago
  51. 2e2a68b roda/rk886ex: Expose VGA devices in devicetree by Patrick Georgi · 12 years ago
  52. e204e2a lint: Avoid downloading blobs repository by Patrick Georgi · 12 years ago
  53. 8a36634 Don't pre-enable SATA AHCI in romstage.c by Stefan Reinauer · 12 years ago
  54. d4bacf9 Print some useful debugging information in PSS table creation by Stefan Reinauer · 12 years ago
  55. 6870f0c Make creation of CBMEM_ID_RESUME_SCRATCH depending on Agesa by Stefan Reinauer · 12 years ago
  56. f125d80 Add missing newline to printk in Sandybridge init code by Stefan Reinauer · 12 years ago
  57. cabc804 Tell CBMEM pretty printer about MRC cache by Stefan Reinauer · 12 years ago
  58. 3b5a9ed Fix register corruption during Intel Microcode update by Stefan Reinauer · 12 years ago
  59. 8bec7fb ChromeOS: drop unused debug header description by Stefan Reinauer · 12 years ago
  60. adc05c1 Make Intel i5000 specific options only appear on i5000 systems by Stefan Reinauer · 12 years ago
  61. 252111d Don't include console.h in microcode.c when compiling with ROMCC by Stefan Reinauer · 12 years ago
  62. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  63. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  64. 4aca5d7 Fix issue with PCIe power management setup by Duncan Laurie · 12 years ago
  65. b9fe01c Add an option to enable PCIe root port coalescing by Duncan Laurie · 12 years ago
  66. c323036 Update PCIe Root Port _PRT to handle re-mapped functions by Duncan Laurie · 12 years ago
  67. 2c41c40 Drop CONFIG_MAX_PHYSICAL_CPUS on non-AMD boards by Stefan Reinauer · 12 years ago
  68. 816d081 Fix SATA port map to only enable port 0 by Stefan Reinauer · 12 years ago
  69. 8508cff Update Ivybridge GT power meter tables by Duncan Laurie · 12 years ago
  70. dd585b8 Update ivybridge graphics initialization by Duncan Laurie · 12 years ago
  71. c908fc7 Fix TPM driver to work with multiple vendor TPMs by Stefan Reinauer · 12 years ago
  72. 95be1d6 Don't disable ACPI in the S3 resume path by Duncan Laurie · 12 years ago
  73. 7b508dd Only send ME Dram Init Done message on Sandybridge by Duncan Laurie · 12 years ago
  74. 0ff99b7 Modify DMI init for IvyBridge by Vincent Palatin · 12 years ago
  75. 459b777 add new LPC controller device ID value by Vadim Bendebury · 12 years ago
  76. 8049fc9 Allow device ID arrays in the PCI driver structure by Vadim Bendebury · 12 years ago
  77. 599e204 Clean up Emerald Lake 2 mainboard directory by Gabe Black · 12 years ago
  78. 8172d0b Allow more CPU cores on Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago
  79. f40a259 Set up ChromeOS dev mode, recovery, and write protect GPIOs on Emerald Lake 2. by Gabe Black · 12 years ago
  80. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  81. a1155b4 Move VSA support from x86 to Geode by Patrick Georgi · 12 years ago
  82. 0909d86 Support adding stages with cbfs-files by Patrick Georgi · 12 years ago
  83. 843005c Add vsa processor to cbfs-files by Patrick Georgi · 12 years ago
  84. 943ddce Make geode_lx use the vsa from blobs repository by Patrick Georgi · 12 years ago
  85. 5fe7a20 Set up the Emerald Lake 2 SMI and SCI sources based on the schematic. by Gabe Black · 12 years ago
  86. bea8421 abuild: Add option to use binary files by Patrick Georgi · 12 years ago
  87. 7e9b9d8 Add Kconfig options to handle the blobs repository by Patrick Georgi · 12 years ago
  88. 1db6e2a Add 3rdparty as submodule by Patrick Georgi · 12 years ago
  89. e1ae4b2 Add support for Sandybridge base Samsung ChromeBox by Stefan Reinauer · 12 years ago
  90. 155e9b5 Add support for Sandybridge based Samsung ChromeBook by Stefan Reinauer · 12 years ago
  91. 6651da3 Add support for Intel Emerald Lake 2 CRB by Stefan Reinauer · 12 years ago
  92. c31384e Fix up Sandybridge C state generation code by Stefan Reinauer · 12 years ago
  93. f69b468 acpigen: make acpigen_write_CST_package_entry non-static by Stefan Reinauer · 12 years ago
  94. 6ea86b1 Sandybridge: Temporarily disable MRC cache finding code by Stefan Reinauer · 12 years ago
  95. 35555167 acpi: Add defines for functional fixed hardware by Stefan Reinauer · 12 years ago
  96. 39205c6 acpigen: Add support for generating T state tables by Stefan Reinauer · 12 years ago
  97. 4cc8c70 Rework ACPI CST table generation by Stefan Reinauer · 12 years ago
  98. a403c68 Add default map_oprom_vendev() for AMD Family 14h processors. by Martin Roth · 12 years ago
  99. f3005f5 Update SeaBIOS stable to the version 1.7.0 tag. by Marc Jones · 12 years ago
  100. 40aa9bc Update amd/south_station/fadt.c with various fixes by Martin Roth · 12 years ago