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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / soc / nvidia / tegra124 / dp.c
  1. 7dbf9c6 edid: Use edid_mode struct to reduce redundancy by David Hendricks · 9 years ago
  2. f0d21ff3 tegra124: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  3. ac4fef8 tegra124: use known-good drive for fast-train only by Neil Chen · 10 years ago
  4. 8c440a6 tegra124: add support for full DP link training by Neil Chen · 10 years ago
  5. 75f70179 nyan*: Add fast link training functions by Jimmy Zhang · 10 years ago
  6. d712ec4 nyan*: Set SOR_NV_PDISP_SOR_DP_SPARE0 register by Jimmy Zhang · 10 years ago
  7. 3af0d31 tegra124: Initialize display panel by EDID. by Hung-Te Lin · 10 years ago
  8. 2d43a48 tegra124: set MOT bit for I2C-over-AUX by Ken Chang · 10 years ago
  9. c04d3dd7 tegra124: Add tegra_dc_i2c_aux_read to allow reading EDID. by Hung-Te Lin · 10 years ago
  10. bd5925a t124: Clean up display init functions by Jimmy Zhang · 10 years ago
  11. 24d4f7f tegra124/nyan: memory and display updates by Andrew Bresticker · 11 years ago
  12. edf6b57 tegra124/nyan: display, clock, and other updates by Julius Werner · 11 years ago