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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / soc / imgtec / pistachio / clocks.c
  1. 4f3d400 imgtec/pistachio: disable default RPU gate register values by Ionela Voinescu · 9 years ago
  2. 8835754 imgtec/pistachio: I2C: fix base address for I2C clock setup by Ionela Voinescu · 9 years ago
  3. 1136447 imgtec/pistachio: Use SYS PLL in integer mode by Ionela Voinescu · 9 years ago
  4. 90d1235 mainboard/google/urara: change SYS PLL to 700MHz by Ionela Voinescu · 9 years ago
  5. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  6. 1d4c305 pistachio: sort included header files by Ionela Voinescu · 9 years ago
  7. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  8. 38063b0 pistachio: add clock setup for all I2C interfaces by Ionela Voinescu · 9 years ago
  9. fdce680 pistachio: implement clock setup for I2C0 by Ionela Voinescu · 9 years ago
  10. a702390 pistachio: Fix ROM clock base address by Ionela Voinescu · 9 years ago
  11. 8b1f23e urara: add clock setup for MIPS CPU, ROM and Ethernet by Ionela Voinescu · 9 years ago
  12. 41d1ca8 pistachio: fix clocks setup code by Ionela Voinescu · 9 years ago
  13. b3f666b urara: Configure clocks and MFIOs by Ionela Voinescu · 9 years ago