Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
9631016660423d0585a1
/
src
/
cpu
/
x86
/
lapic
/
secondary.S
a146d58
ramstage: prepare for relocation
by Aaron Durbin
· 12 years ago
82ecf4c
secondary.S: Fix dropping ramstage.a
by Stefan Reinauer
· 12 years ago
8b93059
Pass the CPU index as a parameter to startup.
by Ronald G. Minnich
· 12 years ago
51676b1
Revert "Use broadcast SIPI to startup siblings"
by Sven Schnelle
· 12 years ago
6f73a5b
Fix stack assignment during CPU initialization
by Sven Schnelle
· 12 years ago
63539bb
Only copy real-mode section of SIPI vector
by Kyösti Mälkki
· 12 years ago
9a663f3
Fix the CPU index parameter passed to secondary_cpu_init().
by Kyösti Mälkki
· 12 years ago
042c146
Use broadcast SIPI to startup siblings
by Sven Schnelle
· 12 years ago
c5fc7db
Move C labels to start-of-line
by Patrick Georgi
· 12 years ago
14e2277
Since some people disapprove of white space cleanups mixed in regular commits
by Stefan Reinauer
· 14 years ago
5f5436f
drop "arch/asm.h" and "arch/intel.h" and create "cpu/x86/post_code.h"
by Stefan Reinauer
· 14 years ago
72ee9b0
issue 51 and 52: set mtrr for ap before stop it, and _RAMBASE above 1M
by Yinghai Lu
· 19 years ago
f84926e
tell people that the segment descriptors are different for ROMCC and GCC code.
by Li-Ta Lo
· 20 years ago
f8a2ddd
- To reduce confuse rename the parts of linuxbios bios that run from
by Eric Biederman
· 20 years ago
fcd5ace
- Add new cvs code to cvs
by Eric Biederman
· 20 years ago