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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / cpu / amd / car
  1. 7b22d84 drivers/pc80: Add optional spinlock for nvram CBFS access by Timothy Pearson · 9 years ago
  2. 44d5342 src/console: Add x86 romstage spinlock option and printk spinlock support by Timothy Pearson · 9 years ago
  3. 20d9fb4 amd/car: don't apply Fam10h/Fam12h Errata 343 fix to Fam0Fh by Jonathan A. Kollasch · 9 years ago
  4. 42b6265 cpu/amd/car/post_cache_as_ram: Avoid trailing spaces by Paul Menzel · 9 years ago
  5. 0122afb cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence by Timothy Pearson · 9 years ago
  6. 38508a0 cpu/amd: Fix AMD Family 15h ECC initialization reliability issues by Timothy Pearson · 9 years ago
  7. 1f78099 cpu/amd/car: Add romstage BSP stack overrun detection by Timothy Pearson · 9 years ago
  8. 730a043 cpu/amd: Add initial AMD Family 15h support by Timothy Pearson · 9 years ago
  9. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  10. e67d240 cpu/amd/car: Honor BKDG recommendations for DisFillP in CAR by Timothy Pearson · 9 years ago
  11. 2003844 cpu/amd/car: Add initial Suspend to RAM (S3) support by Timothy Pearson · 9 years ago
  12. 83c3c9e cpu/amd/car: Use standard integer types in post_cache_as_ram.c by Timothy Pearson · 9 years ago
  13. d657446 cpu/amd/car: remove PRINTK_IN_CAR #define that was hardcoded to 1 by Timothy Pearson · 9 years ago
  14. 1c4508e cpu/amd: Add initial support for AMD Socket G34 processors by Timothy Pearson · 9 years ago
  15. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  16. 0dc7354 amd: raminit sysinfo offset fix by Aaron Durbin · 9 years ago
  17. 4a45ec4 x86: Drop -Wa,--divide by Stefan Reinauer · 9 years ago
  18. fb39f82 cpu/amd/car: Move AP stacks below the BSP stack to free up space by Timothy Pearson · 9 years ago
  19. a97e007 cpu/amd/car: Increase Family 10h CAR size limit to 128k by Timothy Pearson · 9 years ago
  20. b5e4655 cpu/amd: Detect any conflicts between sysinfo and the stack region by Timothy Pearson · 9 years ago
  21. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  22. 0127c6c AMD: Uniformly define MSRs for TOP_MEM and TOP_MEM2 by Kyösti Mälkki · 9 years ago
  23. 78c5d58 ACPI: Add acpi_is_wakeup_s3() for romstage by Kyösti Mälkki · 10 years ago
  24. 5491ca2 cpu: Drop print_ implementation from non-romcc boards by Stefan Reinauer · 10 years ago
  25. abc083e AMD (K8/fam10): Rewrite CAR migration in post_cache_as_ram by Kyösti Mälkki · 11 years ago
  26. 207880c Declare acpi_is_wakeup_early() only once by Kyösti Mälkki · 11 years ago
  27. 2458f42 AMD: Add common header file for CAR setup by Kyösti Mälkki · 10 years ago
  28. 20f25dd Rename coreboot_ram stage to ramstage by Furquan Shaikh · 10 years ago
  29. e5760af cpu/amd/car: Use define MSR_MCFG_BASE rather than hardcoded value by Patrick Georgi · 10 years ago
  30. fa8ceda AMD K8/fam10: Fix CBMEM on S3 resume by Kyösti Mälkki · 11 years ago
  31. 142b52c AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes by Kyösti Mälkki · 11 years ago
  32. 88a67f0 AMD boards (non-AGESA): Cleanup earlymtrr.c includes by Kyösti Mälkki · 11 years ago
  33. a6c29fe amd/car/post_cache_as_ram: Switch stack in assembly rather than in C by Vladimir Serbinenko · 11 years ago
  34. d50cdf1 CBMEM: Drop parameter from cbmem_reinit() by Kyösti Mälkki · 11 years ago
  35. bc90e15 CBMEM: Backup top_of_ram instead of cbmem_toc by Kyösti Mälkki · 11 years ago
  36. 4c3ab73 cpu: Fix spelling by Martin Roth · 11 years ago
  37. 648d166 copy_and_run: drop boot_complete parameter by Stefan Reinauer · 11 years ago
  38. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  39. bbc880e amdk8/amdfam10: Use CAR_GLOBAL for sysinfo by Patrick Georgi · 12 years ago
  40. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  41. 05e740f Replace cache control magic numbers with symbols by Patrick Georgi · 12 years ago
  42. 472efa6 Remove whitespace. by Patrick Georgi · 12 years ago
  43. 784544b Remove XIP_ROM_BASE by Patrick Georgi · 13 years ago
  44. 9438da3 Fix slow CAR execution introduced by 7c7d87182feb78cb2bc02fb3558bef56a41682c9 by Rudolf Marek · 13 years ago
  45. 1da1046 Get rid of AUTO_XIP_ROM_BASE by Patrick Georgi · 13 years ago
  46. 00c8c4a Update AMD SR5650 and SB700 by efdesign98 · 13 years ago
  47. d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
  48. 139e6f9 Use symbolic names for some MTRR bits instead of numbers in CAR code by Stefan Reinauer · 13 years ago
  49. daecb18 According to AMD documentation, cache type WP should be used for by Scott Duplichan · 13 years ago
  50. 7b0500c Revert r5902 to make code more readable again. At least three people like to by Stefan Reinauer · 13 years ago
  51. bcaea14 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c by Rudolf Marek · 14 years ago
  52. bda153b For AMD family 10h processors, msr c0010058 is always programmed by Scott Duplichan · 14 years ago
  53. 4ffde94 Reduce duplicate definition in CAR code. by Warren Turkal · 14 years ago
  54. 36455aa Add comments to make it clear why these two lines are written like that: by Uwe Hermann · 14 years ago
  55. dd83670 Factor out common CAR asm snippets. by Uwe Hermann · 14 years ago
  56. c2d0bfb Add missing parenthesis (trivial). by Uwe Hermann · 14 years ago
  57. 66d1687 CAR simplifications, typos, readability improvements (trivial). by Uwe Hermann · 14 years ago
  58. 4292684 Various cosmetic and coding style fixes in CAR code (trivial). by Uwe Hermann · 14 years ago
  59. 1d36d6d Use existing, readable MTRR #defines instead of hardcoding numbers. by Uwe Hermann · 14 years ago
  60. 9b0c690 This patch corrects a coding error in the original implementation by Scott Duplichan · 14 years ago
  61. 2b28614 CONFIG_MMCONF_SUPPORT is always defined. Fix build. by Myles Watson · 14 years ago
  62. e7a5b76 Move initialization of MMCONF BAR to cache_as_ram setup phase, in order by Arne Georg Gleditsch · 14 years ago
  63. 6f57b51 Fix all warnings in the tree by Stefan Reinauer · 14 years ago
  64. aed9920 replace outb -> port 0x80 with post_code() in some places. by Stefan Reinauer · 14 years ago
  65. beba990 Following patch reworks car_disable into C. Tested, works here. I compared by Rudolf Marek · 14 years ago
  66. c928a29 Remove another set of includes from Fam10 romstages: by Patrick Georgi · 14 years ago
  67. 3d5bb23 Move includes to where they are needed. This allows to simplify by Patrick Georgi · 14 years ago
  68. aa987b2 drop unused files by Stefan Reinauer · 14 years ago
  69. 853263b copy_and_run.c is not needed twice, and it is used on non-car too. by Stefan Reinauer · 14 years ago
  70. 10b29d8 thin out romcc epilogue and have it call copy_and_run as by Stefan Reinauer · 14 years ago
  71. 56a684a - copy_and_run() gets the same calling convention on AMD and on all the others. by Stefan Reinauer · 14 years ago
  72. 64ed2b7 Drop \r\n and \n\r as both print_XXX and printk now do this internally. by Stefan Reinauer · 14 years ago
  73. cca6268 get coreboot_ap memory training in cache mechanism in place. Didn't work since by Stefan Reinauer · 14 years ago
  74. e799c8b Revert my debugging patch that got committed by accident. Sorry. by Myles Watson · 14 years ago
  75. 08e0fb8 Fix all the format string warnings. Some other random warnings. by Myles Watson · 14 years ago
  76. c02b4fc printk_foo -> printk(BIOS_FOO, ...) by Stefan Reinauer · 14 years ago
  77. 8a0c649 The parameters of memset() should be by Zheng Bao · 14 years ago
  78. 78acf932 Remove remaining uses of by Patrick Georgi · 14 years ago
  79. f326e3a Replace spaces with tabs. Trivial. by Myles Watson · 14 years ago
  80. ed15220 Replace clear_memory with memset. by Myles Watson · 14 years ago
  81. d1fc066 Clobber registers as appropriate in AMD CAR code, and by Rudolf Marek · 14 years ago
  82. 548dbe7 Random cosmetic fixes (trivial). by Uwe Hermann · 14 years ago
  83. 4b8a241 Allow building images with different prefixes (ie. normal/romstage, by Patrick Georgi · 14 years ago
  84. 95c50c6 - Let AMD CAR code pick the right XIP area by Rudolf Marek · 15 years ago
  85. d73c1b5 Define some variables that were not defined. There are a couple left. by Myles Watson · 15 years ago
  86. 707fad0 White space and comment fixes for cache_as_ram.inc files so it's easier to spot by Myles Watson · 15 years ago
  87. 35ed0e7 Remove PRINTK_IN_CAR tests from AMD files. by Myles Watson · 15 years ago
  88. 0f61a4f Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE. by Myles Watson · 15 years ago
  89. 59b2dc2 White space and typo fixes. This makes it easier to compare the s2895 & s2892. by Myles Watson · 15 years ago
  90. 6768f39 Remove: by Patrick Georgi · 15 years ago
  91. 6e23576 Remove some warnings. by Myles Watson · 15 years ago
  92. 0867062 This patch unifies the use of config options in v2 to all start with CONFIG_ by Stefan Reinauer · 15 years ago
  93. c263b44 Fix for Erratum 343 for AMD Fam10h CPUs. by Marco Schmidt · 15 years ago
  94. a034dca Move coreboot_ram and coreboot_apc to CBFS. This allows to by Patrick Georgi · 15 years ago
  95. ef04d82 The rev 4099 broke ECC boards, they need to have tidy the ECC tags. Myles reverted this change. by Rudolf Marek · 15 years ago
  96. 12aba82 Refactor copy_and_run so that it uses a single code base instead of by Patrick Georgi · 15 years ago
  97. bc9de2f Revert 4099 patch that causes an ECC error. Memory has to be written while ECC by Myles Watson · 15 years ago
  98. a572f83 Following patch adds necessary hooks and as well the compile time checks for by Rudolf Marek · 15 years ago
  99. 08afc6d Unify CAR so the same compiled code does the right thing on both by Patrick Georgi · 15 years ago
  100. 87c938f adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot" by Stefan Reinauer · 16 years ago