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coreboot
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941847652406982f3c9944fdd98cce4029b533fb
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src
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soc
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rockchip
/
rk3288
/
sdram.c
9418476
arm(64): Manually clean up the mess left by write32() transition
by Julius Werner
· 10 years ago
2f37bd6
arm(64): Globally replace writel(v, a) with write32(a, v)
by Julius Werner
· 10 years ago
5c8aacf
rockchip: configure lpddr odt properly
by Derek Basehore
· 10 years ago
8cc3a2a
rk3288: support single channel ddr
by jinkun.hong
· 10 years ago
ee28c86
rk3288: detect sdram size at runtime
by huang lin
· 10 years ago
129b5fa
rk3288: Fix failing LPDDR3 reboot test
by jinkun.hong
· 10 years ago
d4a227b
rk3288: Fix failing DDR3 reboot test
by jinkun.hong
· 10 years ago
8188ab7
rk3288: Increase the delay after DDR reset de-assert to 10us.
by Dailunxue
· 10 years ago
7a453eb
rk3288: Change all SoC headers to <soc/headername.h> system
by Julius Werner
· 10 years ago
b6092b7
veyron_pinky/rk3288: Use KHz, MHz and GHz constants
by Julius Werner
· 10 years ago
3e9ea16
coreboot: rk3288: add new ddr config and support ddr3 freq up to 800mhz
by jinkun.hong
· 10 years ago
82ba4d0
rk3288: add cpu and chip
by huang lin
· 10 years ago
c33ce35
rk3288: add ddr driver
by Jinkun Hong
· 10 years ago