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77dbbac7e710c279c8208a5e5f5e766ef4565524
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northbridge
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
b91a0f2
Rename cache_lbmem() to cache_ramstage()
by Stefan Reinauer
· 12 years ago
6097e19
Make ACPI code detect Sandy/Ivy Bridge dynamically
by Stefan Reinauer
· 12 years ago
afcaac2
Drop (empty) sandybridge_late_initialization()
by Stefan Reinauer
· 12 years ago
baae2d2
Add support for HM70 and NM70 LPC bridge
by Stefan Reinauer
· 12 years ago
542e962
Print PCI ID of PCH during boot up
by Stefan Reinauer
· 12 years ago
c664387
Drop leading spaces from CPU name string
by Stefan Reinauer
· 12 years ago
4821489
Fix MRC cache update delays
by Stefan Reinauer
· 12 years ago
496f4a0
SandyBridge: Add another PCI device ID for northbridge
by Walter Murphy
· 12 years ago
da83a5f
Fixes to enable RC6 on IvyBridge
by Duncan Laurie
· 12 years ago
ce6e9fe
i945: Disable IGD if plugin VGA is preferred
by Patrick Georgi
· 12 years ago
6db7f34
Trinity wrapper code improvement.
by zbao
· 12 years ago
8bacc40
Fix udelay() implementation for i945 romstage
by Nico Huber
· 12 years ago
bcdbe90
Drop VGA_BRIDGE_SETUP config option
by Patrick Georgi
· 12 years ago
cda9f93
Intel SCH northbridge: fix resource index
by Kyösti Mälkki
· 12 years ago
1171986
Drop invalid device ops on Agesa northbridge
by Kyösti Mälkki
· 12 years ago
de3dde4
AMD: Fix GFXUMA with 4GB or more RAM
by Kyösti Mälkki
· 12 years ago
ba589e3
Move setup_uma_memory() to K8 northbridge
by Kyösti Mälkki
· 12 years ago
231f261
Move setup_uma_memory() to AMDFAM10 northbridge
by Kyösti Mälkki
· 12 years ago
55fff930
Move setup_uma_memory() to Agesa Family14 northbridge
by Kyösti Mälkki
· 12 years ago
d4821fc
Move setup_uma_memory() to Agesa Family12 northbridge
by Kyösti Mälkki
· 12 years ago
03548aa
Move setup_uma_memory() to Agesa Family15 northbridge
by Kyösti Mälkki
· 12 years ago
cc55b9b
Define global uma_memory variables
by Kyösti Mälkki
· 12 years ago
63f8c08
Add global uma_resource()
by Kyösti Mälkki
· 12 years ago
d422069
i5000: Fix resource allocation
by Sven Schnelle
· 12 years ago
34d86f0
i5000: reset system if raminit fails
by Sven Schnelle
· 12 years ago
7b48379
i5000: Add PCI ids for all i5000 flavours
by Sven Schnelle
· 12 years ago
6444bd4
i945: Reset IGD on boot
by Patrick Georgi
· 12 years ago
2c08f6a
AGESA F15 wrapper for Trinity
by zbao
· 12 years ago
904a0ec
Don't use 64-bit constant 0x100000000 in linker scripts
by Nico Huber
· 12 years ago
1454685
i5000: fix another typo
by Sven Schnelle
· 12 years ago
39b47d2
i5000: fix typos
by Sven Schnelle
· 12 years ago
1a7a7e6
i5000: enforce hard reset
by Sven Schnelle
· 12 years ago
88fc0b9
Sandybridge: Remove remnants of FDT support from MRC cache code
by Stefan Reinauer
· 12 years ago
6e901fd
Sandybridge: Fix MRC cache calculation
by Stefan Reinauer
· 12 years ago
2f00ce3
cbtypes.h: Unify cbtypes.h used in AMD board's code
by Vikram Narayanan
· 12 years ago
bb11e60
Hook up MRC cache update
by Stefan Reinauer
· 12 years ago
1244f4b
Rework Sandybridge MRC cache handling
by Stefan Reinauer
· 12 years ago
f8f0062
Some more #if cleanup
by Patrick Georgi
· 12 years ago
e166782
Clean up #ifs
by Patrick Georgi
· 12 years ago
f125d80
Add missing newline to printk in Sandybridge init code
by Stefan Reinauer
· 12 years ago
adc05c1
Make Intel i5000 specific options only appear on i5000 systems
by Stefan Reinauer
· 12 years ago
cafedcf
Strip quotes from Sandybridge MRC blob
by Stefan Reinauer
· 12 years ago
7a3f36a
Sandybridge: Display platform information early
by Vadim Bendebury
· 12 years ago
8508cff
Update Ivybridge GT power meter tables
by Duncan Laurie
· 12 years ago
dd585b8
Update ivybridge graphics initialization
by Duncan Laurie
· 12 years ago
7b508dd
Only send ME Dram Init Done message on Sandybridge
by Duncan Laurie
· 12 years ago
0ff99b7
Modify DMI init for IvyBridge
by Vincent Palatin
· 12 years ago
e6063fe
Fix Sandybridge/Ivybridge mainboards according to code review
by Stefan Reinauer
· 12 years ago
6ea86b1
Sandybridge: Temporarily disable MRC cache finding code
by Stefan Reinauer
· 12 years ago
a403c68
Add default map_oprom_vendev() for AMD Family 14h processors.
by Martin Roth
· 12 years ago
e9dfdd9
Reverse Vendor ID & Device ID for map_oprom_vendev()
by Martin Roth
· 12 years ago
16401b8
SMM: Add udelay on Sandybridge systems
by Stefan Reinauer
· 12 years ago
93b4ed9
Intel e7505: build as separate object file
by Kyösti Mälkki
· 12 years ago
97c064f
Intel e7505: enable ECC scrubbing
by Kyösti Mälkki
· 12 years ago
26b00e6
Refactor some alignment handling
by Patrick Georgi
· 12 years ago
77e4f7d
Intel e7505: refactor only
by Kyösti Mälkki
· 12 years ago
26c7b86
Intel e7505: handlers for undocumented registers
by Kyösti Mälkki
· 12 years ago
f722373
S3 code in coreboot public folder.
by zbao
· 12 years ago
2c2e78d
Unify IO APIC address specification
by Patrick Georgi
· 13 years ago
5c1ff92
Intel e7505: cleanups
by Kyösti Mälkki
· 12 years ago
5bd271b
Intel e7505: renames only
by Kyösti Mälkki
· 12 years ago
cab72d9
amdfam10: add phenom II as known cpu
by Bernhard Urban
· 12 years ago
00636b0
Add support for Intel Sandybridge CPU (northbridge part)
by Stefan Reinauer
· 12 years ago
c0c5ac7
Add the support for RDC R8610 Northbridge
by Rudolf Marek
· 12 years ago
dd3b227
Fix AMD Fam15 CBMEM allocation
by Stefan Reinauer
· 12 years ago
30b46ce
Fix AMD Fam12 CBMEM allocation
by Stefan Reinauer
· 12 years ago
cc6c615
Fix AMD Fam10 CBMEM allocation
by Stefan Reinauer
· 12 years ago
3ae1c65
AMD Agesa: delete no-op bootblock files
by Kyösti Mälkki
· 12 years ago
d11ca1d
Rename AMD_AGESA to CPU_AMD_AGESA
by Kyösti Mälkki
· 12 years ago
f5bb477
Fix AMD Agesa leaking Kconfig
by Kyösti Mälkki
· 12 years ago
eb5e28f
Intel northbridge I945: Apply un-written naming rules
by Kyösti Mälkki
· 12 years ago
35e1c86
VIA southbridge K8T890: Apply un-written naming rules
by Kyösti Mälkki
· 12 years ago
5750ed2
Fix AMD Fam14 cbmen allocation
by Marc Jones
· 12 years ago
8d59569
Clean up whitespace in fam14 northbridge.c
by Marc Jones
· 12 years ago
c5fc7db
Move C labels to start-of-line
by Patrick Georgi
· 12 years ago
067d223
Fix ECC disable option for AMD Fam10 DDR2 and DDR3.
by Marc Jones
· 12 years ago
334328a
Avoid ../../.. paths in ASL files
by Patrick Georgi
· 13 years ago
fdcd135
Rename i945 ACPI files to not carry an i945_ prefix
by Patrick Georgi
· 13 years ago
472efa6
Remove whitespace.
by Patrick Georgi
· 13 years ago
6811f75
AGESA F15: AGESA family15 model 00-0fh northbridge wrapper
by Kerry Sheh
· 13 years ago
6b909f2
RD890: AMD RD890/SR56X0 CIMX wrapper
by Kerry Sheh
· 13 years ago
bdc8c83
Remove non-existent include
by Sven Schnelle
· 13 years ago
332a7e9
i5000: halt second BSP
by Sven Schnelle
· 13 years ago
1767086
Add Intel i5000 Memory Controller Hub
by Sven Schnelle
· 13 years ago
751508a
northbridge/intel/i945: CHECK_SLFRCS_ON_RESUME Kconfig option
by Peter Stuge
· 13 years ago
976f8cc
Make Geode GX2 VGA setup work.
by Nils Jacobs
· 13 years ago
784ffb3
i945: fix tsc udelay()
by Sven Schnelle
· 13 years ago
d0ac789
Update geode GX2 tree to match LX.
by Nils Jacobs
· 13 years ago
84e0dfc
Clean up AMD Fam14 SSDT
by Marc Jones
· 13 years ago
a4f06f1
White space and coding style fixes.
by Nils Jacobs
· 13 years ago
36b53bf
k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x
by Florian Zumbiehl
· 13 years ago
2a830d0
Change AMD vendorcode build
by Kyösti Mälkki
· 13 years ago
fa48b96
k8 raminit: fix bug, improve clock selection, add clock limit for sock754
by Florian Zumbiehl
· 13 years ago
6f7b158
fix DDR_MASK in load-dependent clock limiting for socket 939 in k8 raminit
by Florian Zumbiehl
· 13 years ago
7e9de01
Cycle time at CAS Latency (CLX - 2) is at 25 in DDR2 SPD, not at 26
by Florian Zumbiehl
· 13 years ago
5ff7c13
remove trailing whitespace
by Stefan Reinauer
· 13 years ago
0a0d5e8
Add support for E7505 northbridge.
by Kyösti Mälkki
· 13 years ago
481814d
Clear improper use of CONFIG_CACHE_AS_RAM
by Kyösti Mälkki
· 13 years ago
b15975b
copy e7501 component to e7505
by Stefan Reinauer
· 13 years ago
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