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review.coreboot.org / coreboot / 77133afe3142096cc7ea7755bfc727f59f2282f9 / src / soc / rockchip / rk3288 / bootblock.c
  1. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  2. d17a862 rk3288: Use timestamp region for pre-cbmem timestamps by Furquan Shaikh · 10 years ago
  3. 20864c1 rockchip/rk3288: Initialize CPU in bootblock by Patrick Georgi · 9 years ago
  4. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  5. 33df495 rk3288: Implement support for CRYPTO module and use it in vboot hashing by Julius Werner · 10 years ago
  6. 44cf870 timer: Reestablish init_timer(), consolidate timer initialization calls by Julius Werner · 10 years ago
  7. df5bf2b rk3288: Move UART initialization to bootblock_mainboard_early_init() by Julius Werner · 10 years ago
  8. a512e11 arm: Redesign mainboard and SoC hooks for bootblock by Julius Werner · 10 years ago
  9. 94e4d81 console: fix Kconfig uses by Patrick Georgi · 9 years ago
  10. 7a453eb rk3288: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  11. dae15a6 rk3288: Add early SRAM mapping by Julius Werner · 10 years ago
  12. 3b63161 pinky: Move some init to mainboard bootblock by David Hendricks · 10 years ago
  13. bbcffd9 rockchip: support i2c clock setting by huang lin · 10 years ago
  14. 5c2988c veyron: select rw romstage using vboot2 by Daisuke Nojiri · 10 years ago
  15. 817e455 add make_idb.py & update bootblock by huang lin · 10 years ago
  16. 503d121 rk3288: add clock module by jinkun.hong · 10 years ago
  17. ac490b8 coreboot: rk3288: Add a stub implementation of the rk3288 SOC by jinkun.hong · 10 years ago