1. 68ff337 nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT by Michał Żygowski · 2 years, 8 months ago
  2. 66780a0 nb/intel/sandybridge: Use new fixed BAR accessors by Angel Pons · 3 years, 4 months ago
  3. b33c6fb nb/intel/x4x,sandybridge: Move INITRAM timestamps by Kyösti Mälkki · 3 years, 5 months ago
  4. 4ce0a07 nb/intel/x4x,sandybridge: Move romstage_handoff_init() call by Kyösti Mälkki · 3 years, 5 months ago
  5. 8547823 src: Remove unused 'include <stdint.h> by Elyes HAOUAS · 4 years, 2 months ago
  6. 9733f6a nb/intel/sandybridge: Use PCI bitwise ops by Angel Pons · 4 years, 1 month ago
  7. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  8. 6e5aabd nb/intel/sandybridge: Use SPDX headers by Angel Pons · 4 years, 4 months ago
  9. 7c49cb8 nb/intel/sandybridge: Tidy up code and comments by Angel Pons · 4 years, 4 months ago
  10. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  11. ffa520f intel/sandybridge,bd82x6x: Move enable_smbus() call by Kyösti Mälkki · 4 years, 6 months ago
  12. fa5d0f8 nb/intel/sandybridge: Set up console in bootblock by Arthur Heymans · 4 years, 8 months ago
  13. 9c53834 nb/intel/sandybridge: Make the mainboard_rcba_config hook optional by Arthur Heymans · 4 years, 8 months ago
  14. dc2e7c6 nb/intel/sandybridge: Make the mainboard_early_init hook optional by Arthur Heymans · 4 years, 8 months ago
  15. 7f50afb drivers/elog: Add elog_boot_notify() by Kyösti Mälkki · 4 years, 10 months ago
  16. cd7a70f soc/intel: Use common romstage code by Kyösti Mälkki · 5 years ago
  17. 157b189 cpu/intel: Enter romstage without BIST by Kyösti Mälkki · 5 years ago
  18. 2cdb65d nb/intel/sandybridge: Drop iommu.c and rename functions by Patrick Rudolph · 5 years ago
  19. 274dabd src/northbridge: Remove unneeded include <arch/io.h> by Elyes HAOUAS · 5 years ago
  20. 9005071 nb/intel/sandybridge: Move boot_count_increment() by Patrick Rudolph · 5 years ago
  21. 1bc7b6e {gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function by Elyes HAOUAS · 5 years ago
  22. 45d4b17 nb/intel/sandybridge: Move southbridge code to bd82x6x by Patrick Rudolph · 5 years ago
  23. e2f0a5f sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB by Patrick Rudolph · 5 years ago
  24. 5d1f9a0 Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX) by Julius Werner · 5 years ago
  25. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  26. 74aa99a src: Drop unused '#include <halt.h>' by Elyes HAOUAS · 5 years ago
  27. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  28. 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
  29. f765d4f src: Remove unneeded include <lib.h> by Elyes HAOUAS · 6 years ago
  30. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  31. db70f3b drivers/tpm: Add TPM ramstage driver for devices without vboot. by Philipp Deppenwiese · 6 years ago
  32. 21b71ce6 src/nb: Fix non-local header treated as local by Elyes HAOUAS · 6 years ago
  33. c07f8fb security/tpm: Unify the coreboot TPM software stack by Philipp Deppenwiese · 6 years ago
  34. ff4025c sb/intel/bd82x6x: Reduce function-disable mess by Nico Huber · 7 years ago
  35. d88fb36 security/tpm: Change TPM naming for different layers. by Philipp Deppenwiese · 7 years ago
  36. 64e2d19 security/tpm: Move tpm TSS and TSPI layer to security section by Philipp Deppenwiese · 7 years ago
  37. 5c31af8 nb/intel/sandybridge/romstage: Use register name by Patrick Rudolph · 7 years ago
  38. 128c104 nb/intel: Fix some spelling mistakes in comments and strings by Martin Roth · 8 years ago
  39. 75d139b intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP by Kyösti Mälkki · 8 years ago
  40. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  41. e8e66f4 southbridge/intel/bd82x6x: Use common gpio.c by Patrick Rudolph · 8 years ago
  42. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  43. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  44. 609bd94 ivy: Add a possiblity for mainboard early init. by Vladimir Serbinenko · 8 years ago
  45. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  46. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago[Renamed from src/northbridge/intel/sandybridge/romstage_native.c]
  47. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  48. ed54cc7 sandybridge native: Add call to TPM code. by Vladimir Serbinenko · 9 years ago
  49. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  50. 8b2c8f1 sandybridge/raminit: Get max mem clock from devicetree by Alexandru Gagniuc · 9 years ago
  51. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  52. 33b535f sandy/ivy/nehalem: Remerge interrupt handling by Vladimir Serbinenko · 10 years ago
  53. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago