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review.coreboot.org / coreboot / 66b0d55d326540e400ad3fa5130666dbd03b9694 / src / soc / intel / braswell / chip.h
  1. cc728f0 soc/braswell: Add interface to program USB2_COMPBG register by shkim · 9 years ago
  2. c4153c1 Strago: Enable CA Mirror by Shobhit Srivastava · 9 years ago
  3. 89a6685 soc/braswell: Disable SD card detect simulation in FSP by Divya Sasidharan · 9 years ago
  4. aff502e soc/braswell: Fix DSP clock by fdurairx · 9 years ago
  5. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  6. 13cd331 Braswell: Modify CB to accomodate new FSPv83 by Subrata Banik · 9 years ago
  7. 789f2b6 fsp1_1: provide binding to UEFI version by Aaron Durbin · 9 years ago
  8. 5468e94 intel/braswell: fix build by Jenny TC · 9 years ago
  9. 153ae10 BCRD2: Enable PMIC SVID config by Jenny TC · 9 years ago
  10. acb9c0b Braswell: Update to end of June. by Lee Leahy · 9 years ago
  11. 3247172 Braswell: Add Braswell SOC support by Lee Leahy · 9 years ago
  12. 25509ee Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  13. 77ff0b1 Braswell: Use Baytrail as Comparison Base by Lee Leahy · 9 years ago