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review.coreboot.org / coreboot / 66b0d55d326540e400ad3fa5130666dbd03b9694 / src / soc / intel / baytrail / refcode.c
  1. 7e7a4df lib: remove assets infrastructure by Aaron Durbin · 9 years ago
  2. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  3. ac12c66c assets: abstract away the firmware assets used for booting by Aaron Durbin · 9 years ago
  4. 899d13d cbfs: new API and better program loading by Aaron Durbin · 9 years ago
  5. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  6. 797ca1b baytrail: broadwell: correct refcode loading by Aaron Durbin · 9 years ago
  7. bd74a4b coreboot: common stage cache by Aaron Durbin · 9 years ago
  8. 18ea2d3 baytrail: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  9. 460703b rmodule: use struct prog while loading rmodules by Aaron Durbin · 9 years ago
  10. 43b7db7 baytrail: fix HAVE_REFCODE_BLOB build errors by Aaron Durbin · 9 years ago
  11. 48b6b97 src: Too many terminators ';;' at end of stmts, stop Skynet by Edward O'Callaghan · 10 years ago
  12. 730e3b0 soc: Trivial - drop trailing blank lines at EOF by Edward O'Callaghan · 10 years ago
  13. c3ed886 intel boards: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  14. 7f17759 baytrail: add way to load reference code from vboot area by Aaron Durbin · 11 years ago
  15. 63fcb4a baytrail: cache reference code for S3 resume by Aaron Durbin · 11 years ago
  16. 8fa6283 baytrail: use version 2 of efi wrapper by Aaron Durbin · 11 years ago
  17. ae5d83e baytrail: add support to run reference code blob by Aaron Durbin · 11 years ago