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coreboot
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66b0d55d326540e400ad3fa5130666dbd03b9694
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src
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soc
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imgtec
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pistachio
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ddr3_init.c
721f299
imgtec/pistachio: DDR2, DDR3: DLL reset set
by Ionela Voinescu
· 9 years ago
6b95406
imgtec/pistachio: DDR2, DDR3: DQS gate early
by Ionela Voinescu
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
ba71ca3
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
3fa1ad0
pistachio: add DDR3 initialization code
by Ionela Voinescu
· 9 years ago