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review.coreboot.org / coreboot / 59431176471beac2e074cf0ebca50c98c1ab50c8 / src / soc / intel / tigerlake / fsp_params.c
  1. 5943117 soc/intel/tigerlake: Configure RP setting by Wonkyu Kim · 4 years, 5 months ago
  2. 16f6aa8 soc/intel/tigerlake: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  3. 555c9b6 soc/intel/tigerlake: Remove Jasper Lake SoC references by Aamir Bohra · 4 years, 6 months ago[Renamed from src/soc/intel/tigerlake/fsp_params_tgl.c]
  4. fc93237 soc/intel/tigerlake: Configure IOM_TYPEC_SW_CONFIGURATION_3 by Brandon Breitenstein · 4 years, 6 months ago
  5. 1163745 soc/intel/tigerlake: Update FSP UPDs to turn on USB4/TBT by Brandon Breitenstein · 4 years, 7 months ago
  6. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 6 months ago
  7. a6bff2d soc/intel/tigerlake: Enable CNVi through dev_enabled by Srinidhi N Kaushik · 4 years, 6 months ago
  8. 84b4882 soc/intel/tigerlake: Configure L1Substates for PCH Root ports by Wonkyu Kim · 4 years, 6 months ago
  9. 2b4ded0 soc/intel/tigerlake: Enable Hybrid storage mode by Wonkyu Kim · 4 years, 6 months ago
  10. 8488853 soc/intel/tigerlake: Enable CNVi Mode by Srinidhi N Kaushik · 4 years, 6 months ago
  11. ad64781 soc/intel/tigerlake: Avoid NULL pointer dereference by John Zhao · 4 years, 6 months ago
  12. 4af0adb soc/intel/tigerlake: Update SerialIoUart settings for Tiger Lake by Srinidhi N Kaushik · 4 years, 6 months ago
  13. b3fa6a0 soc/intel/tigerlake: configure ethernet by Wonkyu Kim · 4 years, 6 months ago
  14. 1bfd56cb soc/intel/tigerlake: Integrate Legacy 8254 timer support by Subrata Banik · 4 years, 7 months ago
  15. 815d96a soc/intel/tigerlake: Enable SATA by Wonkyu Kim · 4 years, 8 months ago
  16. d801b1f soc/intel/tigerlake: Update fsp_params for TGL by Srinidhi N Kaushik · 4 years, 8 months ago
  17. 50ee91c soc/intel/tigerlake: Select correct fsp_param as per SoC Kconfig by Maulik V Vaghela · 4 years, 9 months ago[Copied from src/soc/intel/tigerlake/fsp_params.c]
  18. 86da00d soc/intel/tigerlake: Include soc common lpss header file by Aamir Bohra · 4 years, 9 months ago
  19. 91e89c5 soc/intel/tigerlake: Do initial SoC commit till ramstage by Subrata Banik · 4 years, 10 months ago