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review.coreboot.org / coreboot / 5910aa88a775bf37ebe445fa89c34389add000b6 / src / soc / intel
  1. d3b40bf baytrail: Fix hdmi audio choppy issue by Kein Yuan · 10 years ago
  2. 2088571 baytrail: reinitialize spi controller in SMM finalization by Aaron Durbin · 10 years ago
  3. 56b8309 build system: rename __BOOT_BLOCK__ and __VER_STAGE__ by Patrick Georgi · 9 years ago
  4. 7f28e4e broadwell: Enable turbo ratio if available by Duncan Laurie · 10 years ago
  5. 4a69c34 Broadwell: Pass TSC value to romstage_main by Lee Leahy · 10 years ago
  6. f208905 broadwell: fix typo in pei_data by Duncan Laurie · 10 years ago
  7. 2e073fc broadwell: Add USB3 PHY tuning fields to PEI DATA by Duncan Laurie · 10 years ago
  8. 97acc5e Baytrail: Fix no_dev_behind_port not executed for RP1/2/3. by Kenji Chen · 10 years ago
  9. 94fea49 Broadwell: Fix PCIe L1 Sub-State capability ID not filled. by Kenji Chen · 10 years ago
  10. 0b92a5e broadwell: Fix building with USE=quiet-cb by Duncan Laurie · 10 years ago
  11. 460703b rmodule: use struct prog while loading rmodules by Aaron Durbin · 9 years ago
  12. b71d9b8 Broadwell: Select PCIE_L1_SUB_STATE and apply Broadwell settings. by Kenji Chen · 10 years ago
  13. d9f9507 broadwell: Disable ADSP power gating feature by default by Duncan Laurie · 10 years ago
  14. cdcc9a4 broadwell: Add event log entry for GPIO27 by Duncan Laurie · 10 years ago
  15. af9cbaa Broadwell: Reg_Script: add END tag to array "smbus_init_script" by Ryan Lin · 10 years ago
  16. e383feb Broadwell: Synchronize for power management with FRC by Kenji Chen · 10 years ago
  17. c373f50 Broadwell: Synchronize RO, Link Arbiter, and OBFF with FRC by Kenji Chen · 10 years ago
  18. 8ef55ee Broadwell: Revise programming flow for write-once registers by Kenji Chen · 10 years ago
  19. 87d4a20 broadwell: Configure IOSF Port and Grant Count by Kenji Chen · 10 years ago
  20. 074a028 Samus: Synchronization with FRC to enable PCIe Relaxed Order. by Kenji Chen · 10 years ago
  21. c9bf446 baytrail: Change USB3 PLL VCO and iCLK PLL current on BYT-M/D CPU by Kein Yuan · 10 years ago
  22. 642e598 broadwell: Update PCIe configuration to follow BWG by Kane Chen · 10 years ago
  23. d775dda broadwell: Clear pending GPE events before entering sleep state by Duncan Laurie · 10 years ago
  24. e237f5a Baytrail: Change PCIe root disable algorithm by Kenji Chen · 10 years ago
  25. 6ecaf65 Baytrail: add _PRT to each PCIe root port device by Ted Kuo · 10 years ago
  26. 2af67c9 broadwell: Add reporting of broadwell MCH revision by Duncan Laurie · 10 years ago
  27. 4b2adb1 broadwell: Change CPUID 306D4 to report "E0 or F0" by Duncan Laurie · 10 years ago
  28. 32dfd06 broadwell: me: Fix typo and add missing phase state by Duncan Laurie · 10 years ago
  29. a30f7e6 cbfs: correct types used for accessing files by Aaron Durbin · 9 years ago
  30. 83a8df5 broadwell: fix HAVE_REFCODE_BLOB build errors by Aaron Durbin · 9 years ago
  31. 43b7db7 baytrail: fix HAVE_REFCODE_BLOB build errors by Aaron Durbin · 9 years ago
  32. 72a8e5e Update hex values to CBFS binary name types in Makefiles by Martin Roth · 9 years ago
  33. ebbb0d4 broadwell: add support for smbios type17 in broadwell by Kane Chen · 10 years ago
  34. 4613472 broadwell: Fix some errors in selftest by Kane Chen · 10 years ago
  35. 4fef5a2 broadwell: Apply pcie updates from 2.1.0 ref code by Kane Chen · 10 years ago
  36. a7d8ea8 broadwell: Read and save HSIO version from ME in romstage by Duncan Laurie · 10 years ago
  37. edb55fc broadwell: Fix GPE register addresses by Duncan Laurie · 10 years ago
  38. 55228ba broadwell: Changes from 2.2.0 ref code by Duncan Laurie · 10 years ago
  39. 3215dfb broadwell: Add broadwell specific platform ASL by Duncan Laurie · 10 years ago
  40. 472d0cb broadwell: fixed power gating enable for disabled sata port by Kane Chen · 10 years ago
  41. 8c1fd78 broadwell: sata updates from 2.1.0 ref code by Kane Chen · 10 years ago
  42. 1b0d5a3 broadwell: Fix devslp enable to use correct register by Duncan Laurie · 10 years ago
  43. 542307b broadwell: Add small delay before Flex Ratio reboot by Duncan Laurie · 10 years ago
  44. 047f03a broadwell: Fix TCO register size and event reporting by Duncan Laurie · 10 years ago
  45. 446fb8e broadwell: Misc updates from 2.1.0 ref code by Duncan Laurie · 10 years ago
  46. 124f53f samus: Disable CMDPWR on broadwell by Kane Chen · 10 years ago
  47. 84b9cf4 broadwell: Tweak GFXPAUSE settings based on revision by Duncan Laurie · 10 years ago
  48. 3ed4d39 broadwell: Add config option to disable DSP power gating in D3 by Duncan Laurie · 10 years ago
  49. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  50. d08057a intel/fsp_baytrail: Add PCI Root Port IRQ Routing by Martin Roth · 9 years ago
  51. 9e94dbf ACPI: Get S3 resume state from romstage_handoff by Kyösti Mälkki · 10 years ago
  52. 9604474 broadwell: enable PCIe endpoint CLK power management by Kane Chen · 10 years ago
  53. 2c4aab3 coreboot: fix munged license text by Aaron Durbin · 9 years ago
  54. 0f9c9de fsp_baytrail: Add I2C driver by Werner Zeh · 9 years ago
  55. b5a374d fsp_baytrail: Add new microcode for Bay Trail M by Werner Zeh · 9 years ago
  56. 4104e6c x86: Fix pointer arithmetic regressions from MMIO changes by Kevin Paul Herbert · 9 years ago
  57. 21a5309 soc/intel/baytrail/Kconfig: Remove explicit `HAVE_MONOTONIC_TIMER` by Paul Menzel · 9 years ago
  58. f3a235e intel/broadwell: free local heap object by Patrick Georgi · 9 years ago
  59. eb73a21 soc/fsp_baytrail: Fix use of microcode-related Kconfig variables by Alexandru Gagniuc · 9 years ago
  60. 033bb4b acpi: Generate valid ACPI processor objects by Timothy Pearson · 9 years ago
  61. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  62. 2a84445 fsp_baytrail: Add macros to define 20K pull-up and down by Werner Zeh · 9 years ago
  63. b474abe Baytrail_fsp: Make ME path configurable in menuconfig by Werner Zeh · 9 years ago
  64. 2213843 fsp_baytrail: Get FSP reserved memory from the FSP HOB list by Martin Roth · 10 years ago
  65. cd02ef1 Intel FSP platforms: Fix timestamps by Kyösti Mälkki · 10 years ago
  66. 582b2ae FSP & CBMEM: Fix broken cbmem CAR transition. by Martin Roth · 10 years ago
  67. ae98e83 CBMEM: Always use DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  68. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  69. 0a11a61 CBMEM: Move cbmemc_reinit() by Kyösti Mälkki · 10 years ago
  70. 77b1655 vboot2: add verstage by Stefan Reinauer · 10 years ago
  71. 374f27b baytrail: there is a chance that USBPHY_COMPBG is set to 0 by Kane Chen · 10 years ago
  72. 314c4c3 baytrail: use the setting in devicetree.cb to config USBPHY_COMPBG by Kane Chen · 10 years ago
  73. 4175927 baytrail broadwell: Use timestamps internal stash by Kyösti Mälkki · 10 years ago
  74. 735e10a soc/intel/fsp_baytrail/gpio.c: Silence unused variable warning by Edward O'Callaghan · 10 years ago
  75. 8cc5dc1 soc/intel/broadwell/me.c: Prevent unused function warning by Edward O'Callaghan · 10 years ago
  76. dd191a2 soc/intel/broadwell/spi_loading.c: Remove dead code by Edward O'Callaghan · 10 years ago
  77. d548e5c broadwell: Use correct include file for console functions by Stefan Reinauer · 10 years ago
  78. 9b29aad Revert "Re-factor 'to_flash_offset()' into 'spi_flash.h'" by Kyösti Mälkki · 10 years ago
  79. 5f066b2 doxygen fixes: change @var to @param var by Martin Roth · 10 years ago
  80. 9270553 Re-factor 'to_flash_offset()' into 'spi_flash.h' by Edward O'Callaghan · 10 years ago
  81. 3a6550d timestamps: Switch from tsc_t to uint64_t by Stefan Reinauer · 11 years ago
  82. 229958e broadwell: Hook into the build system by Duncan Laurie · 10 years ago
  83. a6354a1 broadwell: Preparations for building by Marc Jones · 10 years ago
  84. d816a02 baytrail: add more gpio init macros by Kane Chen · 10 years ago
  85. 1a3675e baytrail: Add defines and functions for GPNCORE by Kein Yuan · 10 years ago
  86. 4851bf2 intel baytrail broadwell: Include microcode updates by Kyösti Mälkki · 10 years ago
  87. 270e300 fsp_baytrail: Initialize LPC pads in bootblock for port 80 by Martin Roth · 10 years ago
  88. c9be93f fsp_baytrail: Remove GPIO_NC1 #define by Martin Roth · 10 years ago
  89. 002178a baytrail SOCs: Add missing comma in gpio.h by Martin Roth · 10 years ago
  90. 59e209a baytrail: initialize backlight PWM frequency by Aaron Durbin · 10 years ago
  91. f2612a1 x86: Initialize SPI controller explicitly during PCH init by David Hendricks · 10 years ago
  92. 52669ef fsp_baytrail: Add code to read GPIOs in romstage by Martin Roth · 10 years ago
  93. 71b2145 CBMEM console: Fix boards with BROKEN_CAR_MIGRATE by Kyösti Mälkki · 10 years ago
  94. 13a845a Intel FSP: Move to DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  95. ec9293f spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. by Gabe Black · 10 years ago
  96. 87f3b4e spi: Remove the spi_set_speed and spi_cs_is_valid functions. by Gabe Black · 10 years ago
  97. a0a71b0 fsp platfoms: add prototype & consolidate main entry-point by Martin Roth · 10 years ago
  98. 99a3bba intel/baytrail: Spelling fixes by Martin Roth · 10 years ago
  99. 7c96629 intel/fsp_baytrail: Spelling fixes by Martin Roth · 10 years ago
  100. de7ed6f intel/broadwell: Spelling fixes by Martin Roth · 10 years ago