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review.coreboot.org / coreboot / 45f448f4a4e09b270d964c98d3aced2e73d9d6bc / src / northbridge / intel / haswell / romstage.c
  1. 45f448f haswell: Relocate `mainboard_romstage_entry` to northbridge by Angel Pons · 4 years ago
  2. 14c4f4f haswell: Drop `struct romstage_params` type by Angel Pons · 4 years ago
  3. 6eea191 haswell: Make `copy_spd` a weak function by Angel Pons · 4 years ago
  4. 73fa035 nb/intel/haswell: Add `mb_late_romstage_setup` function by Angel Pons · 4 years ago
  5. 03f0e43 haswell: Drop GPIO indirection layers by Angel Pons · 4 years ago
  6. 6e1c471 haswell: Turn RCBA configuration into a function by Angel Pons · 4 years ago
  7. 2e25ac6 haswell: relocate `romstage_common` to northbridge by Angel Pons · 4 years ago[Renamed (97%) from src/cpu/intel/haswell/romstage.c]
  8. 284a547 nb/intel/haswell: Drop unnecessary variable by Angel Pons · 4 years ago
  9. e816829 haswell: drop unused function parameter by Angel Pons · 4 years ago
  10. cecc4a0 cpu/intel/haswell: Remove unused 'include <cpu/x86/bist.h>' by Elyes HAOUAS · 4 years, 2 months ago
  11. f70bd99 src: Remove unused '#include <stdint.h>' by Elyes HAOUAS · 4 years, 2 months ago
  12. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  13. f23ae0b src/cpu: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  14. 838d8b0 AUTHORS: Move src/cpu/intel copyrights into AUTHORS file by Martin Roth · 4 years, 11 months ago
  15. 157b189 cpu/intel: Enter romstage without BIST by Kyösti Mälkki · 5 years ago
  16. e2e1f12 intel/haswell: Move platform_enter_postcar() by Kyösti Mälkki · 5 years ago
  17. 6e2d0c1 arch/x86: Adjust size of postcar stack by Kyösti Mälkki · 5 years ago
  18. d26844c cpu: Add missing #include <commonlib/helpers.h> by Elyes HAOUAS · 5 years ago
  19. f5cf60f Move calls to quick_ram_check() before CBMEM init by Kyösti Mälkki · 5 years ago
  20. a1e22b8 src: Use 'include <string.h>' when appropriate by Elyes HAOUAS · 5 years ago
  21. 74aa99a src: Drop unused '#include <halt.h>' by Elyes HAOUAS · 5 years ago
  22. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  23. 89989cf src: Drop unused include <arch/acpi.h> by Elyes HAOUAS · 5 years ago
  24. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  25. 4c7eee2 postcar: Make more use of postcar_frame_add_romcache() by Nico Huber · 5 years ago
  26. 4513020 cpu/intel: Use the common code to initialize the romstage timestamps by Arthur Heymans · 6 years ago
  27. 334be32 nb/intel/haswell: Add support for PEG by Tristan Corrick · 6 years ago
  28. 55d6238 src: Remove unneeded include <cbfs.h> by Elyes HAOUAS · 6 years ago
  29. d2b9ec1 src: Remove unneeded include "{arch,cpu}/cpu.h" by Elyes HAOUAS · 6 years ago
  30. 45022ae intel: Use CF9 reset (part 1) by Patrick Rudolph · 6 years ago
  31. 5b2a2d0 src/*: normalize Google copyright headers by Patrick Georgi · 6 years ago
  32. 65bb543 src: Get rid of non-local header treated as local by Elyes HAOUAS · 6 years ago
  33. db70f3b drivers/tpm: Add TPM ramstage driver for devices without vboot. by Philipp Deppenwiese · 6 years ago
  34. faa5f98 cpu/intel/haswell: Use the common intel romstage_main function by Arthur Heymans · 6 years ago
  35. 88af0f3 cpu/intel/haswell: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  36. c07f8fb security/tpm: Unify the coreboot TPM software stack by Philipp Deppenwiese · 6 years ago
  37. d88fb36 security/tpm: Change TPM naming for different layers. by Philipp Deppenwiese · 7 years ago
  38. 64e2d19 security/tpm: Move tpm TSS and TSPI layer to security section by Philipp Deppenwiese · 7 years ago
  39. 47dffa5 chromeec: Remove checks for EC in RO by Daisuke Nojiri · 7 years ago
  40. ffdee28 cpu/intel: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  41. 5aaa8ce haswell: add CBMEM_MEMINFO table when initing RAM by Matt DeVillier · 8 years ago
  42. 26eeb0f cpu/intel: Fix brace issues detected by checkpatch.pl by Lee Leahy · 7 years ago
  43. 9d62e7e cpu/intel: Fix the spacing issues by Lee Leahy · 7 years ago
  44. 7b5f12b9 cpu/intel: Indent with tabs by Lee Leahy · 7 years ago
  45. 140087f CPU: Declare cpu_phys_address_size() for all arch by Kyösti Mälkki · 8 years ago
  46. 77e1399 romstage_handoff: remove code duplication by Aaron Durbin · 8 years ago
  47. de01136 intel post-car: Increase stacktop alignment by Kyösti Mälkki · 8 years ago
  48. 8cd723b lib/prog_loaders: use common ramstage_cache_invalid() by Aaron Durbin · 8 years ago
  49. 585d1a0 src/cpu: Capitalize ROM and RAM by Elyes HAOUAS · 8 years ago
  50. 3f22abb intel/haswell post-car: Minor fix on MTRR setting by Kyösti Mälkki · 8 years ago
  51. b37d01d3 intel/haswell: Add asmlinkage for romstage_after_car() by Kyösti Mälkki · 8 years ago
  52. e5c00a5 intel post-car: Consolidate choose_top_of_stack() by Kyösti Mälkki · 8 years ago
  53. 1891bfd intel/haswell: No need for ACPI S3 resume backup by Kyösti Mälkki · 8 years ago
  54. 65e8f64 intel romstage: Use run_ramstage() by Kyösti Mälkki · 8 years ago
  55. cf0e60f ACPI S3: Add common recovery code by Kyösti Mälkki · 8 years ago
  56. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 8 years ago
  57. a969ed3 Move definitions of HIGH_MEMORY_SAVE by Kyösti Mälkki · 8 years ago
  58. 465eff6 Fix some cbmem.h includes by Kyösti Mälkki · 8 years ago
  59. 0e92bb0 tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))" by Denis 'GNUtoo' Carikli · 8 years ago
  60. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  61. 86091f9 cpu/mtrr.h: Fix macro names for MTRR registers by Alexandru Gagniuc · 9 years ago
  62. 9796f60 coreboot: move TS_END_ROMSTAGE to one spot by Aaron Durbin · 9 years ago
  63. 42e6856 stage_cache: use cbmem init hooks by Aaron Durbin · 9 years ago
  64. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  65. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  66. 8ccdeae haswell: Link stage_cache_external_region into ramstage, too by Sol Boucher · 9 years ago
  67. bd74a4b coreboot: common stage cache by Aaron Durbin · 9 years ago
  68. ae98e83 CBMEM: Always use DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  69. f1e3c76 CBMEM: Do not use get_top_of_ram() with DYNAMIC_CBMEM by Kyösti Mälkki · 10 years ago
  70. bd79c5e Replace hlt() loops with halt() by Patrick Georgi · 10 years ago
  71. e742dda chromeos: provide stub functions for !CONFIG_VBOOT_VERIFY_FIRMWARE by Aaron Durbin · 10 years ago
  72. 1729cd8 x86 romstage: Move stack just below RAMTOP by Kyösti Mälkki · 10 years ago
  73. 0f33307 coreboot: infrastructure for different ramstage loaders by Aaron Durbin · 10 years ago
  74. 75e2974 coreboot: config to cache ramstage outside CBMEM by Aaron Durbin · 11 years ago
  75. d37705c vboot: provide empty vboot_verify_firmware() by Aaron Durbin · 11 years ago
  76. 4fe9813 src/cpu: Fix spelling of MTTR to MTRR by Paul Menzel · 10 years ago
  77. 107f72e Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR by Kyösti Mälkki · 11 years ago
  78. c7633f4 slippy/falco/peppy: Fix SPD GPIO initialization. by Aaron Durbin · 11 years ago
  79. cbf5bdf CBMEM: Always select CAR_MIGRATION by Kyösti Mälkki · 11 years ago
  80. 3d45c40 timestamps: Stash early timestamps in CAR_GLOBAL by Kyösti Mälkki · 11 years ago
  81. e28bd4a timestamps intel: Move timestamp scratchpad to chipset by Kyösti Mälkki · 11 years ago
  82. 7cced0d ec: Add romstage function for checking and rebooting EC by Duncan Laurie · 11 years ago
  83. 5b54d35 haswell: enable cache-as-ram migration by Aaron Durbin · 11 years ago
  84. 648d166 copy_and_run: drop boot_complete parameter by Stefan Reinauer · 11 years ago
  85. 39ecc65 haswell: use asmlinkage for assembly-called funcs by Aaron Durbin · 11 years ago
  86. d02bb62 haswell: vboot path support in romstage by Aaron Durbin · 11 years ago
  87. c0cbd6e haswell: use dynamic cbmem by Aaron Durbin · 11 years ago
  88. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  89. b86113f haswell: RESET_ON_INVALID_RAMSTAGE_CACHE option by Aaron Durbin · 11 years ago
  90. f7cdfe5 haswell: implement ramstage caching in SMM region by Aaron Durbin · 11 years ago
  91. 67481ddc haswell: set TSEG as WB cacheable in romstage by Aaron Durbin · 11 years ago
  92. bf396ff haswell: use s3_resume field in romstage_handoff by Aaron Durbin · 11 years ago
  93. e2d9e5b haswell: support for CONFIG_RELOCATABLE_RAMSTAGE by Aaron Durbin · 11 years ago
  94. 7492ec1 haswell: add romstage_after_car() function by Aaron Durbin · 11 years ago
  95. 2ad1dba haswell: move call site of save_mrc_data() by Aaron Durbin · 11 years ago
  96. 38d9423 haswell: romstage: pass stack pointer and MTRRs by Aaron Durbin · 11 years ago
  97. a267161 haswell: unify romstage logic by Aaron Durbin · 11 years ago
  98. 3d0071b haswell: adjust CAR usage by Aaron Durbin · 11 years ago