1. 43b7f41 src: Make PCI ID define names shorter by Felix Singer · 2 years, 4 months ago
  2. b54388d ACPI: Have common acpi_fill_mcfg() by Kyösti Mälkki · 3 years, 5 months ago
  3. 253c356 sb/amd/cimx/sb800: Clear IOAPIC vectors only once by Kyösti Mälkki · 3 years, 1 month ago
  4. 12d31b2 southbridge/amd: Create ACPI MCFG MMCONFIG by Angel Pons · 3 years, 1 month ago
  5. 131d9f5 src/southbridge: Drop unneeded empty lines by Elyes HAOUAS · 3 years, 11 months ago
  6. e9e13d4 Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register" by Nico Huber · 4 years, 1 month ago
  7. 1fc0edd src: Use pci_dev_ops_pci where applicable by Angel Pons · 4 years, 1 month ago
  8. 04506e2 sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register by Elyes HAOUAS · 4 years, 2 months ago
  9. bfc255a src/sb: Use 'print("%s...", __func__)' by Elyes HAOUAS · 4 years, 4 months ago
  10. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  11. 76cedd2 acpi: Move ACPI table support out of arch/x86 (3/5) by Furquan Shaikh · 4 years, 2 months ago
  12. deeccbf Drop explicit NULL initializations from `device_operations` by Elyes HAOUAS · 4 years, 3 months ago
  13. 182dbde src/southbridge: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  14. f3f36fa src (minus soc and mainboard): Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  15. 44f558e treewide: capitalize 'USB' by Elyes HAOUAS · 4 years, 4 months ago
  16. 287ce5f sb/amd/{agesa,pi}: use ACPIMMIO common block wherever possible by Michał Żygowski · 4 years, 7 months ago
  17. 51b75ae device: Use scan_static_bus() over scan_lpc_bus() by Nico Huber · 5 years ago
  18. cd49cce coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) by Julius Werner · 5 years ago
  19. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  20. f1b58b7 device/pci: Fix PCI accessor headers by Kyösti Mälkki · 5 years ago
  21. dfd4ec2 southbridge/amd/cimx: Drop unused functions by Kyösti Mälkki · 6 years ago
  22. 0f8b8d9 src: Move constant to the right side of comparison by Elyes HAOUAS · 6 years ago
  23. 251279c src/southbridge: Use "foo *bar" instead of "foo* bar" by Elyes HAOUAS · 6 years ago
  24. b0f1988 src: Get rid of unneeded whitespace by Elyes HAOUAS · 6 years ago
  25. dda0fc4 cimx/sb800: Use PCI_DEVFN() by Kyösti Mälkki · 6 years ago
  26. 1a4abb7 sb/amd/cimx/sb800: Get rid of device_t by Elyes HAOUAS · 6 years ago
  27. 9de8ab9 AGESA_LEGACY: Apply final cleanup and file removals by Kyösti Mälkki · 7 years ago
  28. e4a016f AMD CIMx SB800: late.c: Use variable `device` from for loop condition by Paul Menzel · 11 years ago
  29. aa090cb device: acpi_name() should take a const struct device by Aaron Durbin · 7 years ago
  30. 6f55154 AGESA CIMX: Remove empty set_pcie_(de)reset by Kyösti Mälkki · 7 years ago
  31. 28c4d2f AGESA: Introduce AGESA_LEGACY_WRAPPER and its counterpart by Kyösti Mälkki · 8 years ago
  32. 083504b southbridge/amd: add IS_ENABLED() around Kconfig symbol references by Martin Roth · 7 years ago
  33. 1498efe cimx/sb800: Log southbridge call-sites by Kyösti Mälkki · 7 years ago
  34. d8a2c1f southbridge/amd: Add LPC bridge acpi path for Family14 and SB800 by Tobias Diedrich · 7 years ago
  35. ba28e8d src/southbridge: Code formating by Elyes HAOUAS · 8 years ago
  36. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  37. 114a948 amd/cimx/sb800/late.c: Add comment in `sb800_init()` by Paul Menzel · 9 years ago
  38. 12bce3f SB800: Port to 64bit by Stefan Reinauer · 9 years ago
  39. d0e212c devicetree: Discriminate device ops scan_bus() by Kyösti Mälkki · 9 years ago
  40. 83f81ca acpi: Remove monolithic ACPI by Vladimir Serbinenko · 10 years ago
  41. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  42. 13e4182 kbuild: automatically include southbridges by Stefan Reinauer · 9 years ago
  43. 9ef9d85 bootstate: use structure pointers for scheduling callbacks by Aaron Durbin · 9 years ago
  44. 0b87bb7 AMD cimx/sb800: Disconnect PCI bridge 0:14.4 from pins by Kyösti Mälkki · 10 years ago
  45. bde6d30 x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer by Kevin Paul Herbert · 10 years ago
  46. 24501ca AMD cimx/sb800: Initially enable all GPP ports by Kyösti Mälkki · 9 years ago
  47. 41cd047 AMD cimx/sb800: Move cimx init for ramstage by Kyösti Mälkki · 9 years ago
  48. 486c05f AMD cimx/sb800: Fix PCI-to-PCI bridge 0:14.4 configuration by Kyösti Mälkki · 9 years ago
  49. 11f9c35 AMD cimx/sb800: Fix console output by Kyösti Mälkki · 9 years ago
  50. 6355cbf AMD platforms: fix callout_entry doxygen errors by Martin Roth · 10 years ago
  51. 03abaee21 drivers/pc80/mc146818rtc: Assume we always have ALTCENTURY by Gabe Black · 10 years ago
  52. 3c3a50c southbridge/amd agesa & cimx spelling fixes by Martin Roth · 10 years ago
  53. 2a19fb1 amdfam10: Move to per-device ACPI by Vladimir Serbinenko · 10 years ago
  54. b3f08c6 cmos: Rename the CMOS related functions. by Gabe Black · 10 years ago
  55. 2093c4f AMD/agesa: Add functions for AMD PCI IRQ routing by Dave Frodin · 10 years ago
  56. c551caa AMD cimx/sb800: Use acpi_is_wakeup_s3() by Kyösti Mälkki · 10 years ago
  57. c93a75a AMD/CIMx: Add functions for AMD PCI IRQ routing by Mike Loptien · 10 years ago
  58. e61dd0f southbridge/amd/sb?00/lpc.c: Move i8254/i8259 down in southbridge by Edward O'Callaghan · 10 years ago
  59. 35546de AMD AGESA cimx/sb800: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS by Kyösti Mälkki · 10 years ago
  60. e2227a2 usbdebug: Move under drivers/usb by Kyösti Mälkki · 10 years ago
  61. fb387df usbdebug: Drop duplicates of EHCI BAR relocation code by Kyösti Mälkki · 11 years ago
  62. 8a6f7a7 AMD/SB800: Define the GPP PCIe lane distribution by Dave Frodin · 11 years ago
  63. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  64. ac529b1 AMD/Persimmon: Add RTC init to CIMX SB800 by Mike Loptien · 11 years ago
  65. e899e51 SB800: Add IMC ROM and fan control. by Martin Roth · 12 years ago
  66. 23023a5 Enable the FCH GPP port prior to device enumeration by Dave Frodin · 12 years ago
  67. 366f0fc AMD SB: Call the rtc update if needed (Propagation) by zbao · 12 years ago
  68. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  69. 9bcdbf8 Add Southbridge support for S3. by zbao · 12 years ago
  70. 0e6344e SB800: Sata Enable bus master and enable ahci for AHCI/RAID mode by Kerry Sheh · 13 years ago
  71. d7e856b9 sb800: Add Kconfig option ENABLE_IDE_COMBINED_MODE by Kerry Sheh · 13 years ago
  72. 75df106 mainboard: complete the sb800 devicetree even device is off by Kerry Sheh · 13 years ago
  73. feed329 AMD F14 southbridge update by Kerry She · 13 years ago
  74. 3e706b6 amd southbirdge sb800 wrapper, pci bridge fix by Kerry She · 13 years ago
  75. 05a89ab Rename {CPU|NB|SB}/amd/*_wrapper folders by efdesign98 · 13 years ago[Renamed (97%) from src/southbridge/amd/cimx_wrapper/sb800/late.c]
  76. 8fed77a ASRock E350M1: Configure SB800 GPP ports to support onboard pcie nic by Scott Duplichan · 13 years ago
  77. 76d53b2 trivial remove blanks at the end of line by Kerry She · 13 years ago
  78. 991f880 This patch fix a AMD sb800 wrapper compile warning: by Kerry She · 13 years ago
  79. 3f0075b cimx_wrapper/sb800: Fix indent in late.c:sb800_enable() by Peter Stuge · 13 years ago
  80. a64ab46 Update gpp port configuration. by Scott Duplichan · 13 years ago
  81. be8fae1 Program the I/O APIC ID. by Scott Duplichan · 13 years ago
  82. f191c72 Enable AHCI mode and hide IDE controller to reduce boot time. by Scott Duplichan · 13 years ago
  83. 63e62b0 This code provides southbridge initialization for SB800 south bridges. It is dependent on the AMD CIMx/SB800 code. by Frank Vibrans · 13 years ago
  84. 752ab0d remove the code which is not ready to release. by Zheng Bao · 13 years ago
  85. d6a1373 AMD SB800: Drop component prefix from filenames. by Uwe Hermann · 14 years ago[Renamed (96%) from src/southbridge/amd/cimx_wrapper/sb800/sb800_late.c]
  86. 84f59ae Add AMD SB800 southbridge support via cimx_wrapper. by Kerry She · 14 years ago