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review.coreboot.org / coreboot / 43b7f416783ccc98952a4eb5f9274907442b03e5 / src / northbridge
  1. 87213b6 Fix AMD UMA for RS780 by Kyösti Mälkki · 12 years ago
  2. c33f1e9 AMD northbridges: factor out CPU allocation by Kyösti Mälkki · 12 years ago
  3. cd9fc1a AMD northbridges: rewrite CPU allocation by Kyösti Mälkki · 12 years ago
  4. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  5. dbc4739 AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution by Kyösti Mälkki · 12 years ago
  6. 7874e9d Sandybridge: Fix integer overrun in romstage udelay() by Stefan Reinauer · 12 years ago
  7. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  8. 7bdf85b Move cpus_ready_for_init() to AMD K8 by Kyösti Mälkki · 12 years ago
  9. 9ca1c0a Sandy/Ivy Bridge and Cougar/Panther Point: Fix names by Stefan Reinauer · 12 years ago
  10. ffb6bdd AMD f15: Change multiply ONE_MB to bit shifting (Propagation) by zbao · 12 years ago
  11. 15dc3cc AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation) by zbao · 12 years ago
  12. 49bb26a4 AMD NB: Limit the device field to 5 bits. (Propagation) by zbao · 12 years ago
  13. d462736 Limit the device field to 5 bits. by zbao · 12 years ago
  14. 6b5eb1c AMD and GFXUMA: move setup_uma_memory() to northbridge by Kyösti Mälkki · 12 years ago
  15. 30f0464 AMD Agesa and GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 12 years ago
  16. f803ac4 AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 12 years ago
  17. 9fd183e AMD F15tn northbridge: Remove the misleading 0x100 from the limitk. by zbao · 12 years ago
  18. 5e29f00 Intel and GFXUMA: drop redundant use of lb_add_memory_range() by Kyösti Mälkki · 12 years ago
  19. 7f189cc Intel Sandybridge and UMA: use mmio_resource() by Kyösti Mälkki · 12 years ago
  20. 1ec5e74 Intel Sandybridge: add reserved memory as resources by Kyösti Mälkki · 12 years ago
  21. d4ee808 sandybridge: reinitialize usbdebug after MRC by Sven Schnelle · 12 years ago
  22. 6ff1d36 Intel and GFXUMA: fix MTRR and use uma_resource() by Kyösti Mälkki · 12 years ago
  23. 08ef498 Intel 82810 and 82830: always room for PCI memory by Kyösti Mälkki · 12 years ago
  24. b5f5652 Intel i945 and sch: no memory over 4GB by Kyösti Mälkki · 12 years ago
  25. efff733 Refactor driver structs by Patrick Georgi · 12 years ago
  26. 7dc2864 amd/lx: Move configuration from source to Kconfig by Patrick Georgi · 12 years ago
  27. 1b3207e CTDP: Only do TDP down/nominal change from TNP0 by Duncan Laurie · 12 years ago
  28. 55864ef ACPI: Add support for runtime config TDP down by Duncan Laurie · 12 years ago
  29. 405cfe2 Change multiply ONE_MB to bit shifting. by zbao · 12 years ago
  30. d59d624 sync the northbridge.c with other family. by zbao · 12 years ago
  31. f4d3623 ELOG: Add support for a monotonic boot counter in CMOS by Duncan Laurie · 12 years ago
  32. 696262b More descriptive error messages in Sandybridge raminit code by Stefan Reinauer · 12 years ago
  33. 9c4c6ab ELOG: Fix boot count increment for non-wake case by Duncan Laurie · 12 years ago
  34. fe7b5d2 Ivybridge: fix workaround and enable PAIR by Duncan Laurie · 12 years ago
  35. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 12 years ago
  36. b91a0f2 Rename cache_lbmem() to cache_ramstage() by Stefan Reinauer · 12 years ago
  37. 6097e19 Make ACPI code detect Sandy/Ivy Bridge dynamically by Stefan Reinauer · 12 years ago
  38. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 12 years ago
  39. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 12 years ago
  40. 542e962 Print PCI ID of PCH during boot up by Stefan Reinauer · 12 years ago
  41. c664387 Drop leading spaces from CPU name string by Stefan Reinauer · 12 years ago
  42. 4821489 Fix MRC cache update delays by Stefan Reinauer · 12 years ago
  43. 496f4a0 SandyBridge: Add another PCI device ID for northbridge by Walter Murphy · 12 years ago
  44. da83a5f Fixes to enable RC6 on IvyBridge by Duncan Laurie · 12 years ago
  45. ce6e9fe i945: Disable IGD if plugin VGA is preferred by Patrick Georgi · 12 years ago
  46. 6db7f34 Trinity wrapper code improvement. by zbao · 12 years ago
  47. 8bacc40 Fix udelay() implementation for i945 romstage by Nico Huber · 12 years ago
  48. bcdbe90 Drop VGA_BRIDGE_SETUP config option by Patrick Georgi · 12 years ago
  49. cda9f93 Intel SCH northbridge: fix resource index by Kyösti Mälkki · 12 years ago
  50. 1171986 Drop invalid device ops on Agesa northbridge by Kyösti Mälkki · 12 years ago
  51. de3dde4 AMD: Fix GFXUMA with 4GB or more RAM by Kyösti Mälkki · 12 years ago
  52. ba589e3 Move setup_uma_memory() to K8 northbridge by Kyösti Mälkki · 12 years ago
  53. 231f261 Move setup_uma_memory() to AMDFAM10 northbridge by Kyösti Mälkki · 12 years ago
  54. 55fff930 Move setup_uma_memory() to Agesa Family14 northbridge by Kyösti Mälkki · 12 years ago
  55. d4821fc Move setup_uma_memory() to Agesa Family12 northbridge by Kyösti Mälkki · 12 years ago
  56. 03548aa Move setup_uma_memory() to Agesa Family15 northbridge by Kyösti Mälkki · 12 years ago
  57. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 12 years ago
  58. 63f8c08 Add global uma_resource() by Kyösti Mälkki · 12 years ago
  59. d422069 i5000: Fix resource allocation by Sven Schnelle · 12 years ago
  60. 34d86f0 i5000: reset system if raminit fails by Sven Schnelle · 12 years ago
  61. 7b48379 i5000: Add PCI ids for all i5000 flavours by Sven Schnelle · 12 years ago
  62. 6444bd4 i945: Reset IGD on boot by Patrick Georgi · 12 years ago
  63. 2c08f6a AGESA F15 wrapper for Trinity by zbao · 12 years ago
  64. 904a0ec Don't use 64-bit constant 0x100000000 in linker scripts by Nico Huber · 12 years ago
  65. 1454685 i5000: fix another typo by Sven Schnelle · 12 years ago
  66. 39b47d2 i5000: fix typos by Sven Schnelle · 12 years ago
  67. 1a7a7e6 i5000: enforce hard reset by Sven Schnelle · 12 years ago
  68. 88fc0b9 Sandybridge: Remove remnants of FDT support from MRC cache code by Stefan Reinauer · 12 years ago
  69. 6e901fd Sandybridge: Fix MRC cache calculation by Stefan Reinauer · 12 years ago
  70. 2f00ce3 cbtypes.h: Unify cbtypes.h used in AMD board's code by Vikram Narayanan · 12 years ago
  71. bb11e60 Hook up MRC cache update by Stefan Reinauer · 12 years ago
  72. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  73. f8f0062 Some more #if cleanup by Patrick Georgi · 12 years ago
  74. e166782 Clean up #ifs by Patrick Georgi · 12 years ago
  75. f125d80 Add missing newline to printk in Sandybridge init code by Stefan Reinauer · 12 years ago
  76. adc05c1 Make Intel i5000 specific options only appear on i5000 systems by Stefan Reinauer · 12 years ago
  77. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  78. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  79. 8508cff Update Ivybridge GT power meter tables by Duncan Laurie · 12 years ago
  80. dd585b8 Update ivybridge graphics initialization by Duncan Laurie · 12 years ago
  81. 7b508dd Only send ME Dram Init Done message on Sandybridge by Duncan Laurie · 12 years ago
  82. 0ff99b7 Modify DMI init for IvyBridge by Vincent Palatin · 12 years ago
  83. e6063fe Fix Sandybridge/Ivybridge mainboards according to code review by Stefan Reinauer · 12 years ago
  84. 6ea86b1 Sandybridge: Temporarily disable MRC cache finding code by Stefan Reinauer · 12 years ago
  85. a403c68 Add default map_oprom_vendev() for AMD Family 14h processors. by Martin Roth · 12 years ago
  86. e9dfdd9 Reverse Vendor ID & Device ID for map_oprom_vendev() by Martin Roth · 12 years ago
  87. 16401b8 SMM: Add udelay on Sandybridge systems by Stefan Reinauer · 12 years ago
  88. 93b4ed9 Intel e7505: build as separate object file by Kyösti Mälkki · 12 years ago
  89. 97c064f Intel e7505: enable ECC scrubbing by Kyösti Mälkki · 12 years ago
  90. 26b00e6 Refactor some alignment handling by Patrick Georgi · 12 years ago
  91. 77e4f7d Intel e7505: refactor only by Kyösti Mälkki · 12 years ago
  92. 26c7b86 Intel e7505: handlers for undocumented registers by Kyösti Mälkki · 12 years ago
  93. f722373 S3 code in coreboot public folder. by zbao · 12 years ago
  94. 2c2e78d Unify IO APIC address specification by Patrick Georgi · 13 years ago
  95. 5c1ff92 Intel e7505: cleanups by Kyösti Mälkki · 12 years ago
  96. 5bd271b Intel e7505: renames only by Kyösti Mälkki · 12 years ago
  97. cab72d9 amdfam10: add phenom II as known cpu by Bernhard Urban · 12 years ago
  98. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago
  99. c0c5ac7 Add the support for RDC R8610 Northbridge by Rudolf Marek · 12 years ago
  100. dd3b227 Fix AMD Fam15 CBMEM allocation by Stefan Reinauer · 12 years ago