- 1fe6c64 Fix memory size reporting on AMD family 14h systems for >= 4GB by Cristian Măgherușan-Stanciu · 13 years ago
- 23b2152 Improve VIA K8M890 HT settings. Use recommended settings for ROMSIP and by Rudolf Marek · 13 years ago
- 7c0c64e Addition of Family12/SB900 wrapper code by efdesign98 · 13 years ago
- 621ca38 Move existing AMD Ffamily14 code to f14 folder by efdesign98 · 13 years ago
- 05a89ab Rename {CPU|NB|SB}/amd/*_wrapper folders by efdesign98 · 13 years ago
- 471f103 This patch sets max freq defaults for ddr2 and ddr3for fam10. by Marc Jones · 13 years ago
- 16c8e37 agesa_wrapper: Avoid repetitive Kconfig depends, trivial by Peter Stuge · 13 years ago
- 8c46263 Cosmetic cleanup. by Scott Duplichan · 13 years ago
- 5d878ad 1) Remove unused kconfig options. 2) Correct UMA graphics PCI device ID. by Scott Duplichan · 13 years ago
- 9ab3c6c Build device paths for AP cores so that coreboot will report them to the OS. by Scott Duplichan · 13 years ago
- dc312cc Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR. by Scott Duplichan · 13 years ago
- 8d6cf3a Work around unclean CMOS handling for now by Patrick Georgi · 13 years ago
- b251753 Change read_option() to a macro that wraps some API uglyness by Patrick Georgi · 13 years ago
- d4814bd more ifdef -> if fixes by Stefan Reinauer · 13 years ago
- b18f9b0 The "temp" will be used later. So it has to be calculated correctly. by Zheng Bao · 13 years ago
- 432461e cleanup wrong use of defined() after exporting all variables in Kconfig by Stefan Reinauer · 13 years ago
- 5005bb06 Unify use of post_code by Alexandru Gagniuc · 13 years ago
- 2ca2f17 Add AMD C32 support. It is based on other existing Fam10 code. by Zheng Bao · 13 years ago
- 314dd0b Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF. by Scott Duplichan · 13 years ago
- 11ac1cf Mark non-returning function as noreturn to help some compiler versions by Patrick Georgi · 13 years ago
- 6bdc83b Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- c313210 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 6276b6f Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 82b241a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 5bcedee Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- ce62350 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- e80ce0a Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 26f97d2 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 19245c9 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- e485aa4 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 1f93fea Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 0e5d3e1 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- adb23a5 Improving BKDG implementation of P-states, by Xavi Drudis Ferran · 13 years ago
- 70a3733 Add 300 MHz and 500 MHz HT frequency limits by Xavi Drudis Ferran · 13 years ago
- ed1d116 Add compile-time defaults to some K8 CMOS options in case they're absent in CMOS by Josef Kellermann · 13 years ago
- f0ccf6e Errata #169 works on HT, not MC by Josef Kellermann · 14 years ago
- 39fca80 This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code. by Frank Vibrans · 14 years ago
- 1df8542 Implemented workaround for erratum 169, obsoleting erratum 131. by Alexandru Gagniuc · 14 years ago
- dd676dd For Cx, each ChipSel need to be sent MR command. by Zheng Bao · 14 years ago
- c29675f Add a GX2 Kconfig option to choose the framebuffer size. by Nils Jacobs · 14 years ago
- a7296e7 The code is tested on my board with register DIMMs. More tests need to be by Zheng Bao · 14 years ago
- 69436e1 Fix some settings fo AMD MCT. It is based on BIOS test suite. by Zheng Bao · 14 years ago
- 8cf54c9 Use die() to assure the processor can't wake up from an interrupt. by Nils Jacobs · 14 years ago
- 84be0f5 -Change the remaining GLIU1 port 5 register names from VIP (Video Input Port) by Nils Jacobs · 14 years ago
- 19d69e3 Move Geode GX2 UMA video memory size to Kconfig by Nils Jacobs · 14 years ago
- 642509c Remove dead and unused Geode GX2 code by Nils Jacobs · 14 years ago
- 3344743 Replace Geode GX2 MSR addresses for GLCP on GLIU1 with names by Nils Jacobs · 14 years ago
- 1c6d4e6 Clean up Geode GX2 comments, whitespace and coding style. Trivial. by Nils Jacobs · 14 years ago
- cc1e645 Attached patch implements the memory speed reductions (and 2T/1T clock logic) for DDR1 memory (939 sockets). The details can be found in BKDG chapter 4.1.3.3. by Rudolf Marek · 14 years ago
- 59f410f Following patch adds support to bring out the memory out of self refresh when doing resume. by Rudolf Marek · 14 years ago
- 97be27e We hardcode highmemory size in every northbridge! This is bad, and especially if suspend to ram is involved. Let the default be taken from cbmem.h which also handles the suspend logic. by Rudolf Marek · 14 years ago
- 8677a23 After this has been brought up many times before, rename src/arch/i386 to by Stefan Reinauer · 14 years ago
- 8301d83 second round name simplification. drop the <component>_ prefix. by stepan · 14 years ago
- 1bc5cca Move MMCONF resource into the domain for fam10 for the resource allocator. by Myles Watson · 14 years ago
- ea62e9b More explicite and straight way to set seed. by Zheng Bao · 14 years ago
- bcaea14 1) wraps the s3 parts of chipset code/memory init code with if CONFIG_HAVE_ACPI_RESUME == 1 getting rid of ugly define in romstage.c by Rudolf Marek · 14 years ago
- abc0c85 Printing coreboot debug messages on VGA console is pretty much useless, since by Stefan Reinauer · 14 years ago
- d773fd3 Some more DIMM0 related cleanups and deduplication. by Uwe Hermann · 14 years ago
- 607614d Fix/drop some obsolete comments, by Uwe Hermann · 14 years ago
- e0c0a82 This problem was introduced with by Tobias Diedrich · 14 years ago
- f3cce2f MTRR related improvements for AMD family 10h and family 0Fh systems by Scott Duplichan · 14 years ago
- 02d66fd1b Make amdk8 printk_raminit() accept just a single string parameter by Peter Stuge · 14 years ago
- 7bbd7f2 Move K8_ALLOCATE_IO_RANGE to Kconfig. by Patrick Georgi · 14 years ago
- 00e1460 Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c by Patrick Georgi · 14 years ago
- eca3280 Add Kconfig CPU speed selection to Geode GX2 boards. by Nils Jacobs · 14 years ago
- a1e2c56 Remove banner wrapper function and unify print(k) usage. by Nils Jacobs · 14 years ago
- a215b0f Remove some unused code from gx2/raminit.c. by Nils Jacobs · 14 years ago
- 5beac7f Clean up some comments and white space in gx2/northbridgeinit.c by Nils Jacobs · 14 years ago
- 76890dd Change Geode GX2 to use the auto DRAM detect code from Geode LX. by Nils Jacobs · 14 years ago
- 9644623 Remove some unused code. by Nils Jacobs · 14 years ago
- 809e29e GX2: Clean up some white space and comments. by Nils Jacobs · 14 years ago
- fc9fcf7 GX2: Change MSR register numbers into more descriptive names. by Nils Jacobs · 14 years ago
- b69cb5a Convert some comments to proper Doxygen syntax. by Uwe Hermann · 14 years ago
- 1ba2eee Revision 5966 changed the end of line style of the 3 modified files. This change restores the original end of line style. by Scott Duplichan · 14 years ago
- af786b6 When debug logging is enabled, a message such as '* AP 02 timed out:02010501' by Scott Duplichan · 14 years ago
- 8912285 Trivial. Clean up code and add some comments. by Zheng Bao · 14 years ago
- 4b42a62 Factor out a few commonly duplicated functions from northbridge.c. by Uwe Hermann · 14 years ago
- 53b52f3 Trivial. Spell checking. by Zheng Bao · 14 years ago
- 1dcf6689 Trivial. Spell checking. by Zheng Bao · 14 years ago
- c3af12f Trivial. Spell checking. by Zheng Bao · 14 years ago
- 3d682fe Trivial. Fix the typo. by Zheng Bao · 14 years ago
- e5b7507 Remove duplicate line from pci_ids.h. by Jonathan Kollasch · 14 years ago
- b7a7b79 Use %p instead of %x to print void *. by Jonathan Kollasch · 14 years ago
- ebe6d58 Fix spelling/typos in comments. by Jonathan Kollasch · 14 years ago
- e82618d Move CACHE_AS_RAM_ADDRESS_DEBUG out of romstage.c into Kconfig, by Patrick Georgi · 14 years ago
- 52000e1 Trivial. Re-indent the code. by Zheng Bao · 14 years ago
- 8463dd9 Rename build system variables to be more intuitive, and by Patrick Georgi · 14 years ago
- 7b1a3c3 Trivial. re-Indent the code. by Zheng Bao · 14 years ago
- 7cdf1ec Obviously missing brackets. by Xavi Drudis Ferran · 14 years ago
- 86224f6 Mark read-only data as read-only, so the global vars test doesn't fail on it. by Patrick Georgi · 14 years ago
- 10ec0fe - Fix race condition in option_table.h generation by moving the include by Stefan Reinauer · 14 years ago
- 0c51ddd Complete the code which was missing. by Zheng Bao · 14 years ago
- 951a0fe Fix the typo. Field DisAutoRefresh is in DramTimngHi. by Zheng Bao · 14 years ago
- 6c029e6 Add reserved areas for fam10. by Myles Watson · 14 years ago
- 687b3ba Port k8 UMA handling to fam10. by Myles Watson · 14 years ago
- cb817be Fix a typo reported by Sylvain Hitier. by Myles Watson · 14 years ago
- 6ea2115 Move memory type information out of some AMD sockets. by Myles Watson · 14 years ago
- d6689ed Please find appended. This patch gets rid of the %gs magic altogether, by Arne Georg Gleditsch · 14 years ago
- e150e9a Also improve boot time on AMD for the DDR3 code path. Fix a typo, too. by Arne Georg Gleditsch · 14 years ago
- 6556534 Apparently, it's not crucial to clear this at the exact moment we switch by Arne Georg Gleditsch · 14 years ago