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review.coreboot.org / coreboot / 3dbea29ee65c99ae09690765f20869b46464e66a / src / soc / intel / braswell / romstage
  1. d077b58 soc/braswell: Fix issues found during static code analysis by Ravi Sarawadi · 9 years ago
  2. c4153c1 Strago: Enable CA Mirror by Shobhit Srivastava · 9 years ago
  3. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  4. 66208bd FSP 1.1: Replace soc_ prefix with fsp_ by Lee Leahy · 9 years ago
  5. e6af4be intel fsp1_1: prepare for romstage vboot verification split by Aaron Durbin · 9 years ago
  6. cc5ac17 soc/intel/common: remove chipset specific calls by Aaron Durbin · 9 years ago
  7. 3c4053f intel SOC common: Remove unused parameters by Lee Leahy · 9 years ago
  8. 789f2b6 fsp1_1: provide binding to UEFI version by Aaron Durbin · 9 years ago
  9. 9dcd4f0 fsp raminit: Add romstage_params to soc_memory_init_params by Duncan Laurie · 9 years ago
  10. acb9c0b Braswell: Update to end of June. by Lee Leahy · 9 years ago
  11. 3247172 Braswell: Add Braswell SOC support by Lee Leahy · 9 years ago
  12. 42e6856 stage_cache: use cbmem init hooks by Aaron Durbin · 9 years ago
  13. 5264862 Remove empty lines at end of file by Elyes HAOUAS · 9 years ago
  14. 899d13d cbfs: new API and better program loading by Aaron Durbin · 9 years ago
  15. 25509ee Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  16. 0e90dae Move TPM code out of chromeos by Vladimir Serbinenko · 9 years ago
  17. 77ff0b1 Braswell: Use Baytrail as Comparison Base by Lee Leahy · 9 years ago