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3c8cb97ea726cfc4643f75380240e253c095bc14
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northbridge
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intel
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sandybridge
3c8cb97
nb/intel/sandybridge/raminit: Fix normalize_training
by Patrick Rudolph
· 8 years ago
cb7d6a1
nb/intel/sandybridge/raminit: Add default values
by Patrick Rudolph
· 8 years ago
413edc8
nb/intel/sandybridge/raminit: Add debugging output
by Patrick Rudolph
· 8 years ago
cab4d3d
nb/intel/sandybridge/raminit: Add 100MHz refclock support
by Patrick Rudolph
· 8 years ago
77eaba3
nb/intel/sandybridge/raminit: Use Ivy Bridge specific values
by Patrick Rudolph
· 8 years ago
45a0dbc
nb/intel: Deduplicate vbt header
by Patrick Rudolph
· 7 years ago
1210b41
vboot: Select SoC-specific configuration for all Chrome OS boards
by Julius Werner
· 7 years ago
50db9c9
nb/intel/sandybridge: Use DIV_ROUND_UP macro to select timings
by Arthur Heymans
· 7 years ago
6d0c65e
nb/intel/*/northbridge.c: Remove #include <device/hypertransport.h>
by Arthur Heymans
· 8 years ago
305035c
nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge
by Patrick Rudolph
· 8 years ago
b84c833
intel/sandybridge: Use postcar_frame for MTRR setup
by Kyösti Mälkki
· 8 years ago
bd202bc
nb/intel/sandybridge: Lock PAVPC
by Dennis Wassenberg
· 8 years ago
27198ac
MMCONF_SUPPORT: Drop redundant logging
by Kyösti Mälkki
· 8 years ago
e25b5ef
MMCONF_SUPPORT: Consolidate resource registration
by Kyösti Mälkki
· 8 years ago
3d15e10
MMCONF_SUPPORT: Flip default to enabled
by Kyösti Mälkki
· 8 years ago
6f66f41
PCI ops: MMCONF_SUPPORT_DEFAULT is required
by Kyösti Mälkki
· 8 years ago
140087f
CPU: Declare cpu_phys_address_size() for all arch
by Kyösti Mälkki
· 8 years ago
d45114f
intel PCI ops: Remove explicit PCI MMCONF access
by Kyösti Mälkki
· 11 years ago
fd5fa2a
nb/intel/sandybridge/raminit: Split raminit.c
by Patrick Rudolph
· 8 years ago
77e1399
romstage_handoff: remove code duplication
by Aaron Durbin
· 8 years ago
88c6487
nb/intel/nehalem,sandybridge: Hook up libgfxinit
by Nico Huber
· 8 years ago
2966c99
nb/intel/sandybridge/raminit: Support CL > 11
by Patrick Rudolph
· 8 years ago
e74ad21
nb/intel/sandybridge/raminit: Reset internal state on fallback attempts
by Patrick Rudolph
· 8 years ago
809b588
nb/intel/sandybridge/raminit: Do not log inside busy-wait loop
by Kyösti Mälkki
· 8 years ago
bac0fad
Remove explicit select MMCONF_SUPPORT
by Kyösti Mälkki
· 8 years ago
128c104
nb/intel: Fix some spelling mistakes in comments and strings
by Martin Roth
· 8 years ago
e258b9a
intel sandy/ivy: Improve DIMM replacement detection
by Kyösti Mälkki
· 8 years ago
38cb822
intel sandy/ivy: Skip SPD loading on S3 resume path
by Kyösti Mälkki
· 8 years ago
4cb44e5
intel sandy/ivy: Move SPD loading after TS_BEFORE_INITRAM
by Kyösti Mälkki
· 8 years ago
fc5d85c
intel sandy/ivy: Change CRC used to detect DIMM replacement
by Kyösti Mälkki
· 8 years ago
74163d6
nb/intel/sandybridge/raminit: Fix disable_channel
by Patrick Rudolph
· 8 years ago
45d6a55
nb/intel/sandybridge/raminit: Find CMD rate per channel
by Patrick Rudolph
· 8 years ago
069018d
nb/intel/sandybridge/raminit: Define registers
by Patrick Rudolph
· 8 years ago
f704754
nb/intel/sandybridge/raminit: Get rid of fallback attempts
by Patrick Rudolph
· 8 years ago
bec6696
nb/intel/sandybridge/raminit: Fix CAS Write Latency
by Patrick Rudolph
· 8 years ago
e39a8a9
intel/sandybridge: Use romstage_handoff for S3
by Kyösti Mälkki
· 8 years ago
bfca670
intel/sandybridge post-car: Redo MTRR settings and stack selection
by Kyösti Mälkki
· 8 years ago
a4ffe9d
intel post-car: Separate files for setup_stack_and_mtrrs()
by Kyösti Mälkki
· 8 years ago
9b99152
intel/sandybridge: Use common ACPI S3 recovery
by Kyösti Mälkki
· 8 years ago
07e206a
nb/intel/sandybridge/gma: Always initialize DP buffer translation
by Nico Huber
· 8 years ago
7141ff3
nb/intel/*/graphic_init: use sizeof instead of hardcoding edid size
by Arthur Heymans
· 8 years ago
6f8b7df
cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZE
by Nico Huber
· 8 years ago
7db506c
src/northbridge: Remove unnecessary whitespace
by Elyes HAOUAS
· 8 years ago
0d4b11a
src/northbridge: Remove whitespace after sizeof
by Elyes HAOUAS
· 8 years ago
f9c4197
northbridge/sandybridge/raminit_mrc.c: fix missing include
by Matt DeVillier
· 8 years ago
d3284a6
nb/intel/*/gma.c: remove spaces at the fake vbt generation
by Arthur Heymans
· 8 years ago
6fc430b
northbridge/intel/sandybridge: transition away from device_t
by Antonello Dettori
· 8 years ago
12df950
northbridge/intel: Add required space before opening parenthesis '('
by Elyes HAOUAS
· 8 years ago
0cd338e
Remove non-ascii & unprintable characters
by Martin Roth
· 8 years ago
15279a9
src/northbridge: Capitalize CPU, RAM and ROM
by Elyes HAOUAS
· 8 years ago
0325dc6
bootmode: Get rid of CONFIG_BOOTMODE_STRAPS
by Furquan Shaikh
· 8 years ago
9551bed
intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE
by Kyösti Mälkki
· 8 years ago
e4da9aa
intel/sandybridge: read correct leaf for cpu family
by Ryan Salsamendi
· 8 years ago
0306e6a
intel/sandybridge: Fix builds with System Agent blob
by Kyösti Mälkki
· 8 years ago
75d139b
intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP
by Kyösti Mälkki
· 8 years ago
55409eb
nb/intel/sandybridge/raminit: Use supported CAS
by Patrick Rudolph
· 8 years ago
d4c53e3
nb/intel/sandybridge/raminit: Do code cleanup
by Patrick Rudolph
· 8 years ago
b7b1b28
nb/intel/sandybridge/raminit: Do code cleanup
by Patrick Rudolph
· 8 years ago
7bddd30
nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices
by Patrick Rudolph
· 8 years ago
d72cc41
intel/model_206ax: Move platform specific defines
by Kyösti Mälkki
· 8 years ago
a969ed3
Move definitions of HIGH_MEMORY_SAVE
by Kyösti Mälkki
· 8 years ago
266a1f7
nb/intel/raminit (native): Read PCI mmio size from devicetree
by Patrick Rudolph
· 8 years ago
bb9c90a
nb/intel: Factor out common MRC code
by Patrick Rudolph
· 8 years ago
8f3aaa8
Fix leaking CONFIG_VGA=y
by Kyösti Mälkki
· 8 years ago
9c9bde3
nb/intel/sandybridge/raminit: support calling dram_freq multiple times
by Patrick Rudolph
· 8 years ago
2ccb74b
nb/intel/sandybridge/raminit: add additional fallbacks
by Patrick Rudolph
· 8 years ago
588ccaa
nb/intel/sandybridge/raminit: fix regression "always use mrccache"
by Patrick Rudolph
· 8 years ago
4.4
4.4
56abd4d
nb/intel/sandybridge/raminit: always use mrccache
by Patrick Rudolph
· 8 years ago
31d1959
nb/intel/sandybridge/raminit: die in toplevel function
by Patrick Rudolph
· 8 years ago
24a845b
nb/intel/sandybridge/raminit: prepare raminit for fallback
by Patrick Rudolph
· 8 years ago
27e085a
nb/intel/sandybridge/raminit: move ram training into seperate function
by Patrick Rudolph
· 8 years ago
735ecce
nb/intel/sandybridge/raminit: move dimm_info into ramctr_timing
by Patrick Rudolph
· 8 years ago
92fc072
northbridge/intel: move mrccache.c of sandybridge + haswell to common
by Alexander Couzens
· 8 years ago
81c5c76
northbridge/intel: move mrc_cache definition into a common header
by Alexander Couzens
· 8 years ago
f0ab23c
nortbridge/sandybridge/mrccache: parse the return code of flash->write
by Alexander Couzens
· 8 years ago
8e7928a
sandybridge/gma_lvds: support both Sandy&Ivy on one board
by Iru Cai
· 9 years ago
b97009e
nb/intel/sandybridge/raminit: Fill SMBIOS type17 info
by Patrick Rudolph
· 8 years ago
9f3f915
nb/intel/sandybridge/romstage: Read fuse bits for max MEM Clk
by Patrick Rudolph
· 9 years ago
77e45d3
nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
by Patrick Rudolph
· 8 years ago
d7ee9dd
northbridge/intel: add missing #include guards
by Iru Cai
· 8 years ago
d912f1d
nb/intel/sandybridge/raminit: Adjust timB to prevent overflow
by Patrick Rudolph
· 9 years ago
0e92bb0
tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"
by Denis 'GNUtoo' Carikli
· 8 years ago
bd1fdc6
nb/intel/sandybridge/raminit: Add XMP support
by Patrick Rudolph
· 9 years ago
a649a54
nb/intel/sandybridge/raminit: Improve logging
by Patrick Rudolph
· 9 years ago
e4f9d5c
nb/intel/sandybridge: Start PEG link training
by Patrick Rudolph
· 9 years ago
e8e66f4
southbridge/intel/bd82x6x: Use common gpio.c
by Patrick Rudolph
· 9 years ago
0188b13
nb/intel/sandybridge/raminit: Add shift offset
by Patrick Rudolph
· 9 years ago
bd82d18
sandybridge: Always include MRC if not using native RAM init.
by Vladimir Serbinenko
· 9 years ago
144eea0
Make MRC vs native a config rather than making a separate chipset for it.
by Vladimir Serbinenko
· 9 years ago
ffbb3c0
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
by Vladimir Serbinenko
· 9 years ago
59ff340
Kconfig: Move defaults for CBFS_SIZE
by Martin Roth
· 9 years ago
b2eea81
sandybridge: Set all native gfx-related options in northbridge code.
by Vladimir Serbinenko
· 9 years ago
609bd94
ivy: Add a possiblity for mainboard early init.
by Vladimir Serbinenko
· 9 years ago
2dc15e9
Revert "northbridge/intel/peg: Disable unused ports"
by Nico Huber
· 9 years ago
0e06f5b
northbridge/intel/peg: Disable unused ports
by Patrick Rudolph
· 9 years ago
a1c3bed
nb/intel/sandybridge/raminit: Fix two dimms per channel
by Patrick Rudolph
· 9 years ago
3141eac
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
by Vladimir Serbinenko
· 9 years ago
7e513d1
intel/sandybridge/raminit: fix ODT setting
by Patrick Rudolph
· 9 years ago
a696ae7
intel/northbridge/sandy: raminit code cleanup
by Patrick Rudolph
· 9 years ago
35272fd
northbridge/intel ACPI: Remove unused Local method
by Martin Roth
· 9 years ago
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