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coreboot
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348a6d519c9b42f0bbe211f8e550d06aa7d5c210
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src
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soc
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intel
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braswell
/
chip.c
348a6d5
soc/intel/braswell: add USB2 PHY PERPORTRXISET UPD
by Kevin Chiu
· 8 years ago
2c8ac22
soc/intel/braswell: Add USB2 phy setting override
by Matt DeVillier
· 7 years ago
143a836
soc/intel/braswell: Add SoC stepping identify helper
by Matt DeVillier
· 7 years ago
0c68530
soc/intel/braswell: Add I2C clock config options
by Divagar Mohandass
· 9 years ago
1072e7d
soc/intel/braswell: Add int to unsigned
by Lee Leahy
· 7 years ago
d077b58
soc/braswell: Fix issues found during static code analysis
by Ravi Sarawadi
· 9 years ago
89a6685
soc/braswell: Disable SD card detect simulation in FSP
by Divya Sasidharan
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
66208bd
FSP 1.1: Replace soc_ prefix with fsp_
by Lee Leahy
· 9 years ago
13cd331
Braswell: Modify CB to accomodate new FSPv83
by Subrata Banik
· 9 years ago
789f2b6
fsp1_1: provide binding to UEFI version
by Aaron Durbin
· 9 years ago
3247172
Braswell: Add Braswell SOC support
by Lee Leahy
· 9 years ago
25509ee
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
77ff0b1
Braswell: Use Baytrail as Comparison Base
by Lee Leahy
· 9 years ago