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coreboot
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343e13489e3cf78616661e2a9a863337e251d245
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src
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northbridge
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intel
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sandybridge
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romstage.c
274dabd
src/northbridge: Remove unneeded include <arch/io.h>
by Elyes HAOUAS
· 5 years ago
9005071
nb/intel/sandybridge: Move boot_count_increment()
by Patrick Rudolph
· 5 years ago
1bc7b6e
{gm45,pineview,sandybridge,x4x}: Use {full,system}_reset() function
by Elyes HAOUAS
· 5 years ago
45d4b17
nb/intel/sandybridge: Move southbridge code to bd82x6x
by Patrick Rudolph
· 5 years ago
e2f0a5f
sb/intel/bd82x6x: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
by Patrick Rudolph
· 5 years ago
5d1f9a0
Fix up remaining boolean uses of CONFIG_XXX to CONFIG(XXX)
by Julius Werner
· 5 years ago
a1e22b8
src: Use 'include <string.h>' when appropriate
by Elyes HAOUAS
· 5 years ago
74aa99a
src: Drop unused '#include <halt.h>'
by Elyes HAOUAS
· 5 years ago
f1b58b7
device/pci: Fix PCI accessor headers
by Kyösti Mälkki
· 5 years ago
4513020
cpu/intel: Use the common code to initialize the romstage timestamps
by Arthur Heymans
· 6 years ago
f765d4f
src: Remove unneeded include <lib.h>
by Elyes HAOUAS
· 6 years ago
74203de
intel/sandybridge: Don't hardcode platform type
by Patrick Rudolph
· 7 years ago
db70f3b
drivers/tpm: Add TPM ramstage driver for devices without vboot.
by Philipp Deppenwiese
· 6 years ago
21b71ce6
src/nb: Fix non-local header treated as local
by Elyes HAOUAS
· 6 years ago
c07f8fb
security/tpm: Unify the coreboot TPM software stack
by Philipp Deppenwiese
· 6 years ago
ff4025c
sb/intel/bd82x6x: Reduce function-disable mess
by Nico Huber
· 7 years ago
d88fb36
security/tpm: Change TPM naming for different layers.
by Philipp Deppenwiese
· 7 years ago
64e2d19
security/tpm: Move tpm TSS and TSPI layer to security section
by Philipp Deppenwiese
· 7 years ago
5c31af8
nb/intel/sandybridge/romstage: Use register name
by Patrick Rudolph
· 7 years ago
128c104
nb/intel: Fix some spelling mistakes in comments and strings
by Martin Roth
· 8 years ago
75d139b
intel/model_206ax: Prepare for dynamic CONFIG_RAMTOP
by Kyösti Mälkki
· 8 years ago
0e92bb0
tree wide: Convert "if (CONFIG_.*_TPM.*)" to "if (IS_ENABLED(...))"
by Denis 'GNUtoo' Carikli
· 8 years ago
e8e66f4
southbridge/intel/bd82x6x: Use common gpio.c
by Patrick Rudolph
· 9 years ago
144eea0
Make MRC vs native a config rather than making a separate chipset for it.
by Vladimir Serbinenko
· 9 years ago
ffbb3c0
Merge sandy/ivybridge romstage flow for MRC and non-MRC.
by Vladimir Serbinenko
· 9 years ago
609bd94
ivy: Add a possiblity for mainboard early init.
by Vladimir Serbinenko
· 9 years ago
a73b931
tree: drop last paragraph of GPL copyright header
by Patrick Georgi
· 9 years ago
ecf2eb4
sandybridge ivybridge: Treat native init as first class citizen
by Alexandru Gagniuc
· 9 years ago
[Renamed from src/northbridge/intel/sandybridge/romstage_native.c]
9796f60
coreboot: move TS_END_ROMSTAGE to one spot
by Aaron Durbin
· 9 years ago
ed54cc7
sandybridge native: Add call to TPM code.
by Vladimir Serbinenko
· 9 years ago
b890a12
Remove address from GPLv2 headers
by Patrick Georgi
· 9 years ago
8b2c8f1
sandybridge/raminit: Get max mem clock from devicetree
by Alexandru Gagniuc
· 10 years ago
bd79c5e
Replace hlt() loops with halt()
by Patrick Georgi
· 10 years ago
33b535f
sandy/ivy/nehalem: Remerge interrupt handling
by Vladimir Serbinenko
· 10 years ago
fa1d688
sandy/ivy native: dedup romstage.c main()
by Vladimir Serbinenko
· 10 years ago