Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
29cc33181a18e76d033a4f8dc5d3bbd982ce4b9b
/
src
/
soc
/
intel
/
cannonlake
/
Kconfig
29cc331
drivers/intel/gma: Unify VBT related Kconfig names
by Nico Huber
· 6 years ago
730df3c
arch/x86: Make RELOCATABLE_RAMSTAGE the default
by Kyösti Mälkki
· 8 years ago
c4986eb
soc/intel/common/block: Add common chip config block
by Subrata Banik
· 6 years ago
f513ceb
soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL
by Subrata Banik
· 6 years ago
e462585
soc/intel/cannonlake: Enable IDT and expection handling support for all stages
by Aamir Bohra
· 6 years ago
98376b8
soc/intel/cannonlake: Select common XHCI code
by Subrata Banik
· 6 years ago
160fbe5
soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB
by Subrata Banik
· 6 years ago
e66600e
soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config
by Subrata Banik
· 6 years ago
dc23396
soc/intel/cannonlake: Include stage cache support for CNL
by Subrata Banik
· 6 years ago
c0257dd
ifdtool: Add a list of known platforms that support IFD_VERSION_2
by Furquan Shaikh
· 6 years ago
e09ba47
soc/intel/cannonlake: Set Cannonlake I2C clock
by Lijian Zhao
· 6 years ago
551e4be
soc/intel/common: prepare for lpss clock split
by Aaron Durbin
· 6 years ago
2410cd9
soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled
by Duncan Laurie
· 6 years ago
ac1cd44
soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH
by Subrata Banik
· 7 years ago
7492bcb
soc/intel/cannonlake: Increase heap size
by John Zhao
· 7 years ago
a8733e3
soc/intel/cannonlake: CannonaLake make use of FVI information
by Subrata Banik
· 7 years ago
7455881
drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver
by Subrata Banik
· 7 years ago
4a1ee4b
mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp
by N, Harshapriya
· 7 years ago
0e956f2
soc/intel/cannonlake: Add audio NHLT support
by Lijian Zhao
· 7 years ago
9e3ba21
soc/intel/cannonlake: Add option to select FSP_CAR
by Subrata Banik
· 7 years ago
780a1c4
soc/intel/cannonlake: provide LPDDR4 memory init
by Nick Vaccaro
· 7 years ago
031020e
soc/intel/cannonlake: Correct PMC/GPIO routing information
by Lijian Zhao
· 7 years ago
a5bb716
soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
by Furquan Shaikh
· 7 years ago
b8dc63b
ic2/designware: Move Intel i2c logic to shared driver
by Chris Ching
· 7 years ago
2b96f42
soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region()
by Aaron Durbin
· 7 years ago
75c6f4a
soc/intel/cannonlake: Make use of Intel common Graphics block
by Subrata Banik
· 7 years ago
f388561
soc/intel/cannonlake: Define default LPSS clock
by Lijian Zhao
· 7 years ago
5a283ef
soc/intel/cannonlake: Make use of Intel SPI common block
by Subrata Banik
· 7 years ago
7b2d1ae
soc/intel/cannonlake: Add DSP support
by Lijian Zhao
· 7 years ago
9bb684a
soc/intel/cannonlake: Install common i2c
by Lijian Zhao
· 7 years ago
d2c6365
soc/intel/cannonlake: Use SCS common code
by Bora Guvendik
· 7 years ago
899f5ff
soc/intel/cannonlake: Use common p2sb driver
by Lijian Zhao
· 7 years ago
9b6384c
soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB
by John Zhao
· 7 years ago
c85890d
soc/intel/cannonlake: Change max root port to 16
by Lijian Zhao
· 7 years ago
b0c4cbb
soc/intel/cannonlake: Add IGD Support and pre-OS display code
by Abhay Kumar
· 7 years ago
47569cf
soc/intel/cannonlake: Use EBDA area to store cbmem_top address
by Subrata Banik
· 7 years ago
0c8237a
soc/intel/cannonlake: Change default UART number to 2
by Lijian Zhao
· 7 years ago
a06f55b
soc/intel/cannonlake: Enable MRC cache
by Lijian Zhao
· 7 years ago
4a8f45f
soc/intel/cannonlake: reduce bootblock size
by Aaron Durbin
· 7 years ago
f0eb999
soc/intel/cannonlake: Fill the SMI usage
by Lijian Zhao
· 7 years ago
a515849
soc/intel/cannonlake: Add lpc pci driver
by Lijian Zhao
· 7 years ago
fcf8820
soc/intel/cannonlake: Add FSP GOP support
by Abhay kumar
· 7 years ago
2b074d9
soc/intel/cannonlake: Add common ACPI support for CNL
by Lijian Zhao
· 7 years ago
6d7063c
soc/intel/cannonlake: Add Vboot/ChromeOS support
by Lijian Zhao
· 7 years ago
c8c741d
soc/intel/cannonlake: Define Max PCIE Root Ports
by Pratik Prajapati
· 7 years ago
69b5cdb
soc/intel/cannonlake: add gpio files to make
by Nick Vaccaro
· 7 years ago
d37ebdd
soc/intel/canonlake: Enable LPSS UART in 32bit PCI mode
by Lijian Zhao
· 7 years ago
b045d4c
soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLE
by Subrata Banik
· 7 years ago
9027e1b
soc/intel/cannonlake: Init UPD params based on config
by Pratik Prajapati
· 7 years ago
01eda28
soc/intel/cannonlake: Add cpu.c and MP init support
by Pratik Prajapati
· 7 years ago
b3dfcb8
soc/intel/cannonlake: Enable common PMC code for CNL
by Lijian Zhao
· 7 years ago
ce4c9ec
soc/intel/cannonlake: Add Kconfig option to select UART index
by Subrata Banik
· 7 years ago
3211117
soc/intel/cannonlake: Add SPI flash controller driver
by Lijian Zhao
· 7 years ago
8465a81
soc/intel/cannonlake: Add postcar stage support
by Lijian Zhao
· 7 years ago
ae15486
soc/cannonlake: Enable SMM code for Cannon Lake
by Brandon Breitenstein
· 7 years ago
dcf99b0
soc/intel/cannonlake: Sort Kconfig for Cannonlake
by Lijian Zhao
· 7 years ago
80358a1
Revert "soc/intel/cannonlake: Add postcar stage support"
by Martin Roth
· 7 years ago
399c022
soc/intel/cannonlake: Add postcar stage support
by Lijian Zhao
· 7 years ago
a77c68a
soc/intel/cannonlake: Make ramstage relocatable
by Lijian Zhao
· 7 years ago
acfc149
soc/intel/cannonlake: Add microcode support
by Lijian Zhao
· 7 years ago
c854b49
soc/intel/cannonlake: Use common GPIO driver
by Andrey Petrov
· 7 years ago
3e2e050
soc/intel/cannonlake: Add early CPU initialization
by Andrey Petrov
· 7 years ago
8109604
soc/intel/cannonlake: Add initial dummy directory
by Lijian Zhao
· 7 years ago