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review.coreboot.org / coreboot / 27d6299d51744bda549b7764b8fde909ad812e33 / src / soc / intel / tigerlake
  1. e7aa454 soc/intel/tgl: Add PCR_PSF3_T0_SHDW_PMC_REG_BASE for PCH-H by Jeremy Soller · 3 years ago
  2. bc071fe soc/intel/tigerlake: Add TGL-H PEG ports by Jeremy Soller · 3 years ago
  3. 83d795c soc/intel/tigerlake: Add PCIe root ports for PCH-H by Jeremy Soller · 3 years ago
  4. 21d7c47 soc/intel/tigerlake: Add PCH-H GPIO definitions by Jeremy Soller · 3 years ago
  5. 657f7db soc/intel/tigerlake: Add PCH-H PMC GPE group definitions by Jeremy Soller · 3 years ago
  6. 6b1b9ad soc/intel/tigerlake: Add PCH-H chipset devicetree by Jeremy Soller · 3 years ago
  7. 301b09b soc/intel/tigerlake: Add TGL-H power limits by Jeremy Soller · 3 years ago
  8. 49759f6 soc/intel: Add TGL-H CPUID by Jeremy Soller · 3 years ago
  9. 191a8d7 soc/intel/common: Add TGL-H PCI IDs by Jeremy Soller · 3 years ago
  10. 39a37bc mb/*/{tglrvp,volteer,deltaur}: move cpu_cluster configuration to chipset.cb by MAULIK V VAGHELA · 3 years ago
  11. ad08265 soc/intel/tigerlake: Select SF_MASK_2WAYS_PER_BIT if eNEM is enable by Subrata Banik · 3 years, 1 month ago
  12. ebf8a41 soc/intel/tgl: Hook up ucode for TGL-U and TGL-R by Tim Crawford · 3 years ago
  13. 673e6d1 soc/intel/tigerlake: Clean up FSP chipset lockdown configuration by Felix Singer · 3 years, 4 months ago
  14. f3c4f29 soc/intel/tgl: Allow setting PCIe subsystem IDs after FSP-S by Tim Crawford · 3 years ago
  15. 470ca571 Move post_codes.h to commonlib/console/ by Ricardo Quesada · 3 years, 1 month ago
  16. bc35bed soc/intel/*: Allow configuring 8254 timer via CMOS by Sean Rhodes · 3 years, 1 month ago
  17. ac90f59 src/*: Specify type of `CBFS_SIZE` once by Angel Pons · 3 years, 1 month ago
  18. 7502000 soc/intel/common: Rename kconfig PMC_EPOC by Lean Sheng Tan · 3 years, 2 months ago
  19. aec0716 soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h' by Subrata Banik · 3 years, 1 month ago
  20. 7d3e57d soc/intel/tigerlake: Use `is_devfn_enabled()` for Crashlog UPDs by Subrata Banik · 3 years, 1 month ago
  21. 6f5a658 src: Introduce `ARCH_ALL_STAGES_X86` by Angel Pons · 3 years, 2 months ago
  22. c7cfe0b soc/intel: Refactor `xdci_can_enable()` function by Angel Pons · 3 years, 2 months ago
  23. 25d2452 soc/intel/tigerlake: Send End-of-Post message to CSE by Tim Wawrzynczak · 3 years, 2 months ago
  24. 508dc16 soc/intel/common: Move PMC EPOC related code to Intel common code by Lean Sheng Tan · 3 years, 2 months ago
  25. 8e035e3 src: Move `select ARCH_X86` to platforms by Angel Pons · 3 years, 2 months ago
  26. ed042a9 soc/intel/tigerlake: Enable support for common IRQ block by Tim Wawrzynczak · 3 years, 7 months ago
  27. f585c6e soc/intel: Drop casts around `soc_read_pmc_base()` by Angel Pons · 3 years, 2 months ago
  28. c3a5c05 soc/intel/tigerlake: Use devfn_disable() function for XDCI by Subrata Banik · 3 years, 2 months ago
  29. 2b45ba0 soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h by Werner Zeh · 3 years, 2 months ago
  30. 49a2109 soc/intel/tigerlake: Make use of is_devfn_enabled() function by Subrata Banik · 3 years, 2 months ago
  31. 1852303 util: Add DDR4 generic SPD for MT40A512M16TB-062E:R by Wisley Chen · 3 years, 3 months ago
  32. d2f52ff soc/intel/tigerlake: Move MAX_CPUS to Kconfig by Andy Pont · 3 years, 2 months ago
  33. 3e3c456 soc/intel/tigerlake: Hook up FSP repository by Felix Singer · 3 years, 8 months ago
  34. 41a2c73 cpu/x86: Default to PARALLEL_MP selected by Kyösti Mälkki · 3 years, 3 months ago
  35. b9b6f4d soc/intel: Drop unused lpss functions by Furquan Shaikh · 3 years, 3 months ago
  36. ac2cb42 soc/intel/tigerlake: Return TBT PowerResource from PR0 and PR3 by John Zhao · 3 years, 3 months ago
  37. d8bb05a soc/intel/tigerlake: Add validity for TBT firmware authentication by John Zhao · 3 years, 3 months ago
  38. 6419cd3 cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y by Arthur Heymans · 3 years, 10 months ago
  39. 4b3e06e soc/intel/tigerlake: Allow devicetree to fill UPD related to TCSS OC by Nick Vaccaro · 3 years, 3 months ago
  40. 40b8f01 src: Match array format in function declarations and definitions by Patrick Georgi · 3 years, 3 months ago
  41. 3aee3ad soc/intel/{adl,tgl,jsl}: Enable power button smi after BS_CHIPS_EXIT by Kane Chen · 3 years, 4 months ago
  42. 7b7b33e soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster by Kane Chen · 3 years, 4 months ago
  43. 59a621a soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias pads by Tim Wawrzynczak · 3 years, 5 months ago
  44. 6dc7202 soc/intel/tigkerlake: Add IOM PCR PID by Tim Wawrzynczak · 3 years, 4 months ago
  45. a137201 soc/intel/tigerlake: Add known CPU Port IDs for GPIO communities by Tim Wawrzynczak · 3 years, 4 months ago
  46. 8d3cc1b soc/intel/tigerlake: Add known GPIO virtual wire information by Tim Wawrzynczak · 3 years, 4 months ago
  47. b1623f2 soc/intel/*: Update data types for variables holding PCH_DEVFN_* macros by Tim Wawrzynczak · 3 years, 4 months ago
  48. 93982c3 device: Switch pci_dev_is_wake_source to take pci_devfn_t by Tim Wawrzynczak · 3 years, 4 months ago
  49. ae3f524a soc/intel/tigerlake: Use device ID from pci_devs header file by John Zhao · 3 years, 4 months ago
  50. 0c0d492 soc/intel: Replace open-coded buffer length calculation by Angel Pons · 3 years, 5 months ago
  51. 73a22ed soc/intel: Fix typo in comment by Angel Pons · 3 years, 5 months ago
  52. a979460 soc/intel/alderlake: rename CONFIG_MAX_PCIE_CLOCKS to CONFIG_MAX_PCIE_CLOCK_SRC by Rizwan Qureshi · 3 years, 4 months ago
  53. 3062083 soc/intel/tigerlake: Fix devices list in the DMAR DRHD structure by John Zhao · 3 years, 4 months ago
  54. 7f7c388 dptf: Move platform-specific information to `struct dptf_platform_info` by Tim Wawrzynczak · 3 years, 4 months ago
  55. 82d5123 intel/tigerlake: Add Acoustic features by Shaunak Saha · 3 years, 6 months ago
  56. e285257 soc/intel/tigerlake: Fix REG_BASE_SIZE by Tim Wawrzynczak · 3 years, 5 months ago
  57. eb6ebc0 soc/intel/tigerlake: Move TCSS code to intel/common/block by Tim Wawrzynczak · 3 years, 5 months ago
  58. 2ccc0a4 soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.h by Subrata Banik · 3 years, 5 months ago
  59. e433042 soc/intel/tigerlake: Add #include guards to soc/early_tcss.h by Tim Wawrzynczak · 3 years, 5 months ago
  60. 96094b3 util: Add DDR4 generic SPD for H4AAG165WB-BCWE by Nick Vaccaro · 3 years, 5 months ago
  61. 8056187 soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnable by Derek Huang · 3 years, 5 months ago
  62. 172d2d1 soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI device by Cliff Huang · 3 years, 6 months ago
  63. b34be4d soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry by Cliff Huang · 3 years, 7 months ago
  64. 405f229 soc/intel/*: drop UART pad configuration from common code by Michael Niewöhner · 3 years, 8 months ago
  65. d8774f6 soc/intel/tigerlake: Enable TCSS Muxes to disconnect mode during boot by Brandon Breitenstein · 3 years, 6 months ago
  66. 2914455 soc/tigerlake: Fix TCSS code to calling back and forth to mainboard and soc by Brandon Breitenstein · 3 years, 9 months ago
  67. 338d668 soc/intel/tigerlake: Fix NULL being passed for response buffer by Furquan Shaikh · 3 years, 6 months ago
  68. a4cd911 soc/intel: Factor out common smmrelocate.c by Angel Pons · 3 years, 6 months ago
  69. 4280b43 soc/intel/tigerlake: Re-use existing define in CrashLog implementation by Francois Toguo · 3 years, 6 months ago
  70. 98521c5 soc/intel: Retype `CnviBtAudioOffload` devicetree option by Angel Pons · 3 years, 6 months ago
  71. 5d98dab soc/intel: Drop `bootblock_cpu_init()` function by Angel Pons · 3 years, 6 months ago
  72. 53496e6 soc/intel: Drop `romstage_pch_init()` function by Angel Pons · 3 years, 6 months ago
  73. e178df2 soc/intel: Factor out common smbus.h by Angel Pons · 3 years, 6 months ago
  74. 8a269de soc/intel: Factor out common gpe.h by Angel Pons · 3 years, 6 months ago
  75. 98f672a soc/intel: Factor out identical acpigen GPIO helpers by Angel Pons · 3 years, 6 months ago
  76. 09f0605 soc/intel: Include gfx.asl from northbridge by Angel Pons · 3 years, 8 months ago
  77. b6d7a12 soc/intel/*/smmrelocate.c: Sync includes by Angel Pons · 3 years, 6 months ago
  78. 11aeebe soc/intel/*/smmrelocate.c: Uniformize cosmetics by Angel Pons · 3 years, 6 months ago
  79. f5d090d soc/intel/*/pmutil.c: Align cosmetics across platforms by Angel Pons · 3 years, 6 months ago
  80. 4742f53 soc/intel/{adl,jsl,ehl,tgl}: Remove ITSS polarity restore by Aamir Bohra · 3 years, 6 months ago
  81. 2c78424 soc/intel/tigerlake: Remove polling for Link Active Status at resume by John Zhao · 3 years, 6 months ago
  82. 202b189 soc/intel/tigerlake: Enable end of post support in FSP by Nick Vaccaro · 3 years, 6 months ago
  83. 15cbc3b soc/intel/tigerlake: Add CrashLog implementation for intel TGL by Francois Toguo · 3 years, 7 months ago
  84. fce36e4 vc/google/chromeos: Always use CHROMEOS_RAMOOPS_DYNAMIC by Kyösti Mälkki · 3 years, 6 months ago
  85. 4de1a31 ACPI: Add acpi_reset_gnvs_for_wake() by Kyösti Mälkki · 3 years, 7 months ago
  86. c4b3903 soc/intel: Drop aliases on MMCONF_BASE_ADDRESS by Kyösti Mälkki · 3 years, 6 months ago
  87. 7cb4cb6 soc/intel: Remove unused <console/console.h> by Elyes HAOUAS · 3 years, 6 months ago
  88. 45ce5d8 src: Remove unused <arch/cpu.h> by Elyes HAOUAS · 3 years, 7 months ago
  89. fbad99f soc/intel/tgl: Update S0ix enable mask based on SoC and mainboard design by Shreesh Chhabbi · 3 years, 7 months ago
  90. cc93c6e soc/amd,intel: Drop s3_resume parameter on FSP-S functions by Kyösti Mälkki · 3 years, 7 months ago
  91. 62044c3 soc/intel: Drop CID1 from GNVS by Kyösti Mälkki · 3 years, 7 months ago
  92. 30cca6c drivers/intel/fsp2_0: Add support for MP services2 PPI by Aamir Bohra · 3 years, 7 months ago
  93. 5f262be intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI by Furquan Shaikh · 3 years, 7 months ago
  94. 1a5f25e intel: Drop FSP_PEIM_TO_PEIM_INTERFACE by Furquan Shaikh · 3 years, 7 months ago
  95. 21e2b5a soc/intel/tigerlake: Drops 100ms delay in TBT PCIe root ports _PS0 by John Zhao · 3 years, 7 months ago
  96. ed6bda2 soc/intel/tgl: Add configurable value for ConfigTdpLevel by Derek Huang · 3 years, 7 months ago
  97. 0322bc5 src: Remove unused <cbmem.h> by Elyes HAOUAS · 3 years, 7 months ago
  98. 33c0aac soc/intel/*: drop incomplete and unneeded check for DMI SRLOCK by Michael Niewöhner · 3 years, 7 months ago
  99. 9849488 soc/intel: Replace `SA_PCIEX_LENGTH` Kconfig options by Angel Pons · 3 years, 7 months ago
  100. 7d63878 device/Kconfig: Declare MMCONF symbols' type once by Angel Pons · 3 years, 7 months ago